| Message ID | 20240412142702.2882478-2-suzuki.poulose@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | coresight: etm4x: Fix CPU idle PM support for ETE | expand |
Tested-by: Yabin Cui <yabinc@google.com> On Fri, Apr 12, 2024 at 7:27 AM Suzuki K Poulose <suzuki.poulose@arm.com> wrote: > > When we restore the register state for ETM4x, while coming back > from CPU idle, we hardcode IOMEM access. This is wrong and could > blow up for an ETM with system instructions access (and for ETE). > > Fixes: f5bd523690d2 ("coresight: etm4x: Convert all register accesses") > Reported-by: Yabin Cui <yabinc@google.com> > Reviewed-by: Mike Leach <mike.leach@linaro.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index c2ca4a02dfce..7bd849e28953 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -1843,8 +1843,10 @@ static void __etm4_cpu_restore(struct etmv4_drvdata *drvdata) > { > int i; > struct etmv4_save_state *state = drvdata->save_state; > - struct csdev_access tmp_csa = CSDEV_ACCESS_IOMEM(drvdata->base); > - struct csdev_access *csa = &tmp_csa; > + struct csdev_access *csa = &drvdata->csdev->access; > + > + if (WARN_ON(!drvdata->csdev)) > + return; > > etm4_cs_unlock(drvdata, csa); > etm4x_relaxed_write32(csa, state->trcclaimset, TRCCLAIMSET); > -- > 2.34.1 >
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index c2ca4a02dfce..7bd849e28953 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -1843,8 +1843,10 @@ static void __etm4_cpu_restore(struct etmv4_drvdata *drvdata) { int i; struct etmv4_save_state *state = drvdata->save_state; - struct csdev_access tmp_csa = CSDEV_ACCESS_IOMEM(drvdata->base); - struct csdev_access *csa = &tmp_csa; + struct csdev_access *csa = &drvdata->csdev->access; + + if (WARN_ON(!drvdata->csdev)) + return; etm4_cs_unlock(drvdata, csa); etm4x_relaxed_write32(csa, state->trcclaimset, TRCCLAIMSET);
When we restore the register state for ETM4x, while coming back from CPU idle, we hardcode IOMEM access. This is wrong and could blow up for an ETM with system instructions access (and for ETE). Fixes: f5bd523690d2 ("coresight: etm4x: Convert all register accesses") Reported-by: Yabin Cui <yabinc@google.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)