| Message ID | 20240418111002.83015-3-liujianfeng1994@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add hantro g1 video decoder support for RK3588 | expand |
Hi Jianfeng, > On 18 Apr 2024, at 12:10, Jianfeng Liu <liujianfeng1994@gmail.com> wrote: > > Enable Hantro G1 video decoder in RK3588's devicetree. > > Tested with FFmpeg v4l2_request code taken from [1] > with MPEG2, H.264 and VP8 samples. > > [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch > > Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> > Tested-by: Hugh Cole-Baker <sigmaris@gmail.com> > Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index b0a59ec51..b0817382f 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -1135,6 +1135,27 @@ power-domain@RK3588_PD_SDMMC { > }; > }; > > + vpu: video-codec@fdb50000 { > + compatible = "rockchip,rk3588-vdpu121", "rockchip,rk3568-vpu"; > + reg = <0x0 0xfdb50000 0x0 0x800>; The register range at 0xfdb50000 length 0x800 includes "VEPU121 core0" encoder regs at offset 0 and "VDPU121" decoder regs at offset 0x400 (referring to the TRM v1.0 Part 1, section 5.5.1). So I think the "rockchip,rk3588-vdpu121" compatible isn't exactly correct to use for this entire device. IMO "rockchip,rk3588-vpu121" would be more appropriate if including both the decoder and encoder. It also raises the question of whether the decoder and encoder should be modeled in DT as one device like on RK3399, or separate devices. In the vendor DT [0] they are modeled as two devices but they share clocks, resets, IOMMU, and a "rockchip,taskqueue-node" value. I've tested the JPEG encoding functionality of this encoder with [1], and it seems to work, gstreamer produces a MJPEG video of the test pattern as expected. > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > + interrupt-names = "vdpu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "hclk"; > + iommus = <&vdpu_mmu>; > + power-domains = <&power RK3588_PD_VDPU>; > + }; > + > + vdpu_mmu: iommu@fdb50800 { > + compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; > + reg = <0x0 0xfdb50800 0x0 0x40>; > + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > + clock-names = "aclk", "iface"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + power-domains = <&power RK3588_PD_VDPU>; > + #iommu-cells = <0>; > + }; > + > av1d: video-codec@fdc70000 { > compatible = "rockchip,rk3588-av1-vpu"; > reg = <0x0 0xfdc70000 0x0 0x800>; > -- > 2.34.1 > [0]: https://github.com/friendlyarm/kernel-rockchip/blob/18fd1215fee01daef16b6ced1c0c3c3b83a4d8df/arch/arm64/boot/dts/rockchip/rk3588s.dtsi#L3630-L3683 [1]: https://github.com/sigmaris/linux/tree/rk3588-hantro-vpus with: gst-launch-1.0 videotestsrc pattern=ball flip=true ! v4l2jpegenc \ ! matroskamux ! filesink location=jpegtest.mkv
Hi Hugh, Fri, 19 Apr 2024 18:28:01 +0100, Hugh Cole-Baker wrote: >The register range at 0xfdb50000 length 0x800 includes "VEPU121 core0" encoder >regs at offset 0 and "VDPU121" decoder regs at offset 0x400 (referring to the >TRM v1.0 Part 1, section 5.5.1). So I think the "rockchip,rk3588-vdpu121" >compatible isn't exactly correct to use for this entire device. There are five vepu121 cores for jpeg encoding. And Emmanuel is doing work on them[1]. And at the moment the driver doesn’t yet support exposing these cores all as a single video node to userspace, so Emmanuel only exposes one single core. >IMO "rockchip,rk3588-vpu121" would be more appropriate if including both the >decoder and encoder. It also raises the question of whether the decoder and >encoder should be modeled in DT as one device like on RK3399, or separate >devices. In the vendor DT [0] they are modeled as two devices but they share >clocks, resets, IOMMU, and a "rockchip,taskqueue-node" value. Now we have 5 jpeg enc cores, one from 0xfdb50000 and other four from 0xfdba00000. I tried to add a decoding only core 0xfb50400, but that does not work. So the vpu should be defined as one node in devicetree for both encoder and decoder like rk3399. This vpu121 should be exactly the same as the one in rk3399 which supports both encoding and decoding. But the current hantro driver has disabled h264 decoding since there is anthoer decoder rkvdec on rk3399. This vpu121 is the only decoder which supports h254 decoding on rk3588, so we can't just use the vpu_variant from rk3399. Maybe we can use rk3399_vpu_variant back when rkvdec2 on rk3588 is supported by mainline kernel. At the moment we can keep the compatible string same as the one from rk356x. Since there are already jpeg enc cores at 0xfdba0000, we can ignore the one at 0xfdb50000. When rkvdec2 is supported, I will change "rockchip,rk3588-vpu121" same as "rockchip,rk3399-vpu". And I think changing "rockchip,rk3588-vdpu121" to "rockchip,rk3588-vpu121" should match the hardware correctly. [1] https://lore.kernel.org/all/20240418141509.2485053-1-linkmauve@linkmauve.fr/ Best regards, Jianfeng
Le samedi 20 avril 2024 à 13:09 +0800, Jianfeng Liu a écrit : > Hi Hugh, > > Fri, 19 Apr 2024 18:28:01 +0100, Hugh Cole-Baker wrote: > > The register range at 0xfdb50000 length 0x800 includes "VEPU121 core0" encoder > > regs at offset 0 and "VDPU121" decoder regs at offset 0x400 (referring to the > > TRM v1.0 Part 1, section 5.5.1). So I think the "rockchip,rk3588-vdpu121" > > compatible isn't exactly correct to use for this entire device. > > There are five vepu121 cores for jpeg encoding. And Emmanuel is doing work on > them[1]. And at the moment the driver doesn’t yet support exposing these cores > all as a single video node to userspace, so Emmanuel only exposes one single > core. > > > IMO "rockchip,rk3588-vpu121" would be more appropriate if including both the > > decoder and encoder. It also raises the question of whether the decoder and > > encoder should be modeled in DT as one device like on RK3399, or separate > > devices. In the vendor DT [0] they are modeled as two devices but they share > > clocks, resets, IOMMU, and a "rockchip,taskqueue-node" value. > > Now we have 5 jpeg enc cores, one from 0xfdb50000 and other four from > 0xfdba00000. I tried to add a decoding only core 0xfb50400, but that does not > work. So the vpu should be defined as one node in devicetree for both encoder > and decoder like rk3399. > > This vpu121 should be exactly the same as the one in rk3399 which supports both > encoding and decoding. But the current hantro driver has disabled h264 decoding If its exactly the same combo as on rk3399, it have to be combined as they share the same internal memory. You'll notice this strange thing about both being 60fps FHD seperately and 30fps FHD concurrently, this is why. This leaves me with a feeling our understanding the of HW is far from perfect, we should be extra careful and circle back to Rockchip (ping Kever, he'll translate and CC the right person I suppose). Though, just exposing the decoder, and ignoring the encoder seems fine in the short term. Userspace will miss- behave though when we introduce the rkvdec2 decoder. As we'd like to change from trivial time multiplexing to proper core scheduling in the long term (for identical cores only), we have to keep in mind of the possible grouping, which will need to be something deducible from DT. Please keep that in mind when designing DT for this chip. > since there is anthoer decoder rkvdec on rk3399. This vpu121 is the only > decoder which supports h254 decoding on rk3588, so we can't just use the > vpu_variant from rk3399. Maybe we can use rk3399_vpu_variant back when rkvdec2 > on rk3588 is supported by mainline kernel. > > At the moment we can keep the compatible string same as the one from rk356x. > Since there are already jpeg enc cores at 0xfdba0000, we can ignore the one at > 0xfdb50000. When rkvdec2 is supported, I will change "rockchip,rk3588-vpu121" > same as "rockchip,rk3399-vpu". > > And I think changing "rockchip,rk3588-vdpu121" to "rockchip,rk3588-vpu121" > should match the hardware correctly. > > [1] https://lore.kernel.org/all/20240418141509.2485053-1-linkmauve@linkmauve.fr/ > > Best regards, > Jianfeng
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index b0a59ec51..b0817382f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1135,6 +1135,27 @@ power-domain@RK3588_PD_SDMMC { }; }; + vpu: video-codec@fdb50000 { + compatible = "rockchip,rk3588-vdpu121", "rockchip,rk3568-vpu"; + reg = <0x0 0xfdb50000 0x0 0x800>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "vdpu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "hclk"; + iommus = <&vdpu_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + vdpu_mmu: iommu@fdb50800 { + compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg = <0x0 0xfdb50800 0x0 0x40>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; + clock-names = "aclk", "iface"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + av1d: video-codec@fdc70000 { compatible = "rockchip,rk3588-av1-vpu"; reg = <0x0 0xfdc70000 0x0 0x800>;