From patchwork Wed Apr 24 05:09:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao X-Patchwork-Id: 13641211 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0E05C4345F for ; Wed, 24 Apr 2024 05:26:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Bbj/pn8OqJU33okoSHk/VoMEFIB8AmRaA8dgoa+fPTY=; b=WlvGgvKrqBh1LC Ylz1RaJezzy1Pwt+b7c1Jr43BleoG9IdOAWnnyIehRDoDtfNOGf9uh0Bmo5PCuh9nLLD+6F9n5p4B ghsUHOafXZMKR5Wn8FdGIvYaCHuXMwaJb9RYGZHW5dFI6RwGlYvekmqhcpTJNPzU1K1CacnyCzj/f npiahP912KWrJie/cwMzNZDk1kaAsMDhPkk+BrRIrfn8OuwLNJFpjoOq8cNkyDciIiiB6qKlyGKdY rtnJl7UjwFo9p6OiSJ5lXmtl8iyU7w9UtZm4ni9X5RfutxNB7aF+JOGMF/hWF92i45gP0qiAtHtmb Y7zbkyB7RKD91xBgPgJg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzV8s-00000002fDr-192f; Wed, 24 Apr 2024 05:26:02 +0000 Received: from [58.32.228.46] (helo=mail-sh.amlogic.com) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzV8V-00000002f1D-0QJX; Wed, 24 Apr 2024 05:25:40 +0000 Received: from droid01-cd.amlogic.com (10.98.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.6; Wed, 24 Apr 2024 13:10:18 +0800 From: Xianwei Zhao To: , , , , CC: Neil Armstrong , Jerome Brunet , Michael Turquette , "Stephen Boyd" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Xianwei Zhao , Chuan Liu Subject: [PATCH v7 2/5] dt-bindings: clock: add Amlogic C3 SCMI clock controller support Date: Wed, 24 Apr 2024 13:09:25 +0800 Message-ID: <20240424050928.1997820-3-xianwei.zhao@amlogic.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20240424050928.1997820-1-xianwei.zhao@amlogic.com> References: <20240424050928.1997820-1-xianwei.zhao@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.98.11.200] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240423_222539_196740_23FFE29D X-CRM114-Status: UNSURE ( 9.31 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the SCMI clock controller dt-bindings for Amlogic C3 SoC family Co-developed-by: Chuan Liu Signed-off-by: Chuan Liu Signed-off-by: Xianwei Zhao Acked-by: Rob Herring (Arm) --- .../dt-bindings/clock/amlogic,c3-scmi-clkc.h | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 include/dt-bindings/clock/amlogic,c3-scmi-clkc.h diff --git a/include/dt-bindings/clock/amlogic,c3-scmi-clkc.h b/include/dt-bindings/clock/amlogic,c3-scmi-clkc.h new file mode 100644 index 000000000000..663c9b349275 --- /dev/null +++ b/include/dt-bindings/clock/amlogic,c3-scmi-clkc.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (c) 2023 Amlogic, Inc. All rights reserved. + * Author: Chuan Liu + */ + +#ifndef __AMLOGIC_C3_SCMI_CLKC_H +#define __AMLOGIC_C3_SCMI_CLKC_H + +#define CLKID_DDR_PLL_OSC 0 +#define CLKID_DDR_PHY 1 +#define CLKID_TOP_PLL_OSC 2 +#define CLKID_USB_PLL_OSC 3 +#define CLKID_MIPIISP_VOUT 4 +#define CLKID_MCLK_PLL_OSC 5 +#define CLKID_USB_CTRL 6 +#define CLKID_ETH_PLL_OSC 7 +#define CLKID_OSC 8 +#define CLKID_SYS_CLK 9 +#define CLKID_AXI_CLK 10 +#define CLKID_CPU_CLK 11 +#define CLKID_FIXED_PLL_OSC 12 +#define CLKID_GP1_PLL_OSC 13 +#define CLKID_SYS_PLL_DIV16 14 +#define CLKID_CPU_CLK_DIV16 15 + +#endif /* __AMLOGIC_C3_SCMI_CLKC_H */