From patchwork Fri Apr 26 10:45:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 13644578 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 226E4C4345F for ; Fri, 26 Apr 2024 10:45:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=W5Jn9fEb8V7rJcWgJAD8pD+QjNNZNuQzA5B/6iMUp+I=; b=GEH2pdz/2W78jI 6OBBqO4p8KryLv0ZeGGSBEk7VWmGWFRZya1JcKRQKJQFAfqiWf4EmRTCRTIKwD2//Kj5NgbkglXS6 cwOkICGCj657+JveM+ZgS3ergU9pDhSS09EvtYUSj5hUYhFkZsFGlCfrJFVZwm0s8E8e4VZS3drcE tmXgvbCC1zZMLJgm0qr/yS18Zok4MABYj2313aUlWt2DDxZQZOdrNs+E0PmxkZMy8YnoPzmMluHvc T9aFcl2unIwpJDpOAyNXR9hbH6u2SN4xLum2bhkOYeE3KzrlJPfMSUVh7WbdSFql5a1XEhZhzPl7R 4yegqh1KFk1mNHeB340A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s0J4x-0000000CC0a-2DQs; Fri, 26 Apr 2024 10:45:19 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s0J4t-0000000CBzu-3SpD for linux-arm-kernel@lists.infradead.org; Fri, 26 Apr 2024 10:45:17 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43QAj8lt022035; Fri, 26 Apr 2024 05:45:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1714128308; bh=+G7hsmNHlWKp3MAGArQvL4SERCA89ndaYO3wLVxnObY=; h=From:To:CC:Subject:Date; b=X8cp6vmNJa9NwO2efNpAA82fO+z0oMnNhH3ZecU0SxbHtSFQ/hiQHlmeJMioI28IB Wh2sZTytfzzZW9P2woIjLhvYxK/1VzfOB/9aRevj1g7weAv/DfARGZegNi5zipM0zk HuiBmETAC5nQmWJ3xxaMBAGIS/Bwi8t0Fq3Twi8c= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43QAj8bf002628 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 26 Apr 2024 05:45:08 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 26 Apr 2024 05:45:07 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 26 Apr 2024 05:45:08 -0500 Received: from localhost ([10.249.129.12]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43QAj790098712; Fri, 26 Apr 2024 05:45:07 -0500 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH] arm64: dts: ti: k3-j722s-evm: Enable main_uart5 node Date: Fri, 26 Apr 2024 16:15:06 +0530 Message-ID: <20240426104506.29990-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_034516_067466_B32517A3 X-CRM114-Status: GOOD ( 11.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Main_uart5 node defined in the top-level J722S SoC dtsi file is incomplete and may not be functional unless it is extended with pinmux information. As the pinmux is only known at the board integration level, main_uart5 node should only be enabled when provided with this information. Thus, add pinmux for main_uart5 and enable it in the board dts file. Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index cee3a8661d5e..b92d5c385f13 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -18,6 +18,7 @@ / { aliases { serial0 = &wkup_uart0; serial2 = &main_uart0; + serial3 = &main_uart5; mmc0 = &sdhci0; mmc1 = &sdhci1; }; @@ -142,6 +143,14 @@ J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ bootph-all; }; + main_uart5_pins_default: main-uart5-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0108, PIN_INPUT, 3) /* (J27) UART5_RXD */ + J722S_IOPAD(0x010c, PIN_OUTPUT, 3) /* (H27) UART5_TXD */ + >; + bootph-all; + }; + vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */ @@ -243,6 +252,13 @@ &main_uart0 { bootph-all; }; +&main_uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart5_pins_default>; + status = "okay"; + bootph-all; +}; + &mcu_pmx0 { wkup_uart0_pins_default: wkup-uart0-default-pins {