| Message ID | 20240429194920.1596257-1-joao@schimsalabim.eu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] ASoC: sunxi: DMIC: Add controls for adjusting the mic gains | expand |
Dne ponedeljek, 29. april 2024 ob 21:49:20 GMT +2 je Joao Schim napisal(a): > The AllWinner H6 and later SoCs that sport a DMIC block contain a set of registers to control > the gain (left + right) of each of the four supported channels. > > Add ASoC controls for changing each of the stereo channel gains using alsamixer and alike > > Signed-off-by: Joao Schim <joao@schimsalabim.eu> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej > --- > sound/soc/sunxi/sun50i-dmic.c | 34 ++++++++++++++++++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/sound/soc/sunxi/sun50i-dmic.c b/sound/soc/sunxi/sun50i-dmic.c > index c76628bc86c6..dd32780fb6a4 100644 > --- a/sound/soc/sunxi/sun50i-dmic.c > +++ b/sound/soc/sunxi/sun50i-dmic.c > @@ -14,6 +14,7 @@ > #include <sound/dmaengine_pcm.h> > #include <sound/pcm_params.h> > #include <sound/soc.h> > +#include <sound/tlv.h> > > #define SUN50I_DMIC_EN_CTL (0x00) > #define SUN50I_DMIC_EN_CTL_GLOBE BIT(8) > @@ -43,6 +44,17 @@ > #define SUN50I_DMIC_CH_NUM_N_MASK GENMASK(2, 0) > #define SUN50I_DMIC_CNT (0x2c) > #define SUN50I_DMIC_CNT_N (1 << 0) > +#define SUN50I_DMIC_D0D1_VOL_CTR (0x30) > + #define SUN50I_DMIC_D0D1_VOL_CTR_0R (0) > + #define SUN50I_DMIC_D0D1_VOL_CTR_0L (8) > + #define SUN50I_DMIC_D0D1_VOL_CTR_1R (16) > + #define SUN50I_DMIC_D0D1_VOL_CTR_1L (24) > +#define SUN50I_DMIC_D2D3_VOL_CTR (0x34) > + #define SUN50I_DMIC_D2D3_VOL_CTR_2R (0) > + #define SUN50I_DMIC_D2D3_VOL_CTR_2L (8) > + #define SUN50I_DMIC_D2D3_VOL_CTR_3R (16) > + #define SUN50I_DMIC_D2D3_VOL_CTR_3L (24) > + > #define SUN50I_DMIC_HPF_CTRL (0x38) > #define SUN50I_DMIC_VERSION (0x50) > > @@ -273,8 +285,30 @@ static const struct of_device_id sun50i_dmic_of_match[] = { > }; > MODULE_DEVICE_TABLE(of, sun50i_dmic_of_match); > > +static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(sun50i_dmic_vol_scale, -12000, 75, 1); > + > +static const struct snd_kcontrol_new sun50i_dmic_controls[] = { > + > + SOC_DOUBLE_TLV("DMIC Channel 0 Capture Volume", SUN50I_DMIC_D0D1_VOL_CTR, > + SUN50I_DMIC_D0D1_VOL_CTR_0L, SUN50I_DMIC_D0D1_VOL_CTR_0R, > + 0xFF, 0, sun50i_dmic_vol_scale), > + SOC_DOUBLE_TLV("DMIC Channel 1 Capture Volume", SUN50I_DMIC_D0D1_VOL_CTR, > + SUN50I_DMIC_D0D1_VOL_CTR_1L, SUN50I_DMIC_D0D1_VOL_CTR_1R, > + 0xFF, 0, sun50i_dmic_vol_scale), > + SOC_DOUBLE_TLV("DMIC Channel 2 Capture Volume", SUN50I_DMIC_D2D3_VOL_CTR, > + SUN50I_DMIC_D2D3_VOL_CTR_2L, SUN50I_DMIC_D2D3_VOL_CTR_2R, > + 0xFF, 0, sun50i_dmic_vol_scale), > + SOC_DOUBLE_TLV("DMIC Channel 3 Capture Volume", SUN50I_DMIC_D2D3_VOL_CTR, > + SUN50I_DMIC_D2D3_VOL_CTR_3L, SUN50I_DMIC_D2D3_VOL_CTR_3R, > + 0xFF, 0, sun50i_dmic_vol_scale), > + > + > +}; > + > static const struct snd_soc_component_driver sun50i_dmic_component = { > .name = "sun50i-dmic", > + .controls = sun50i_dmic_controls, > + .num_controls = ARRAY_SIZE(sun50i_dmic_controls), > }; > > static int sun50i_dmic_runtime_suspend(struct device *dev) >
On Mon, 29 Apr 2024 21:49:20 +0200, Joao Schim wrote: > The AllWinner H6 and later SoCs that sport a DMIC block contain a set of registers to control > the gain (left + right) of each of the four supported channels. > > Add ASoC controls for changing each of the stereo channel gains using alsamixer and alike > > Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/1] ASoC: sunxi: DMIC: Add controls for adjusting the mic gains commit: 9a8cadddd9303ae15d1d518c4f2ddf00ee668729 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/sound/soc/sunxi/sun50i-dmic.c b/sound/soc/sunxi/sun50i-dmic.c index c76628bc86c6..dd32780fb6a4 100644 --- a/sound/soc/sunxi/sun50i-dmic.c +++ b/sound/soc/sunxi/sun50i-dmic.c @@ -14,6 +14,7 @@ #include <sound/dmaengine_pcm.h> #include <sound/pcm_params.h> #include <sound/soc.h> +#include <sound/tlv.h> #define SUN50I_DMIC_EN_CTL (0x00) #define SUN50I_DMIC_EN_CTL_GLOBE BIT(8) @@ -43,6 +44,17 @@ #define SUN50I_DMIC_CH_NUM_N_MASK GENMASK(2, 0) #define SUN50I_DMIC_CNT (0x2c) #define SUN50I_DMIC_CNT_N (1 << 0) +#define SUN50I_DMIC_D0D1_VOL_CTR (0x30) + #define SUN50I_DMIC_D0D1_VOL_CTR_0R (0) + #define SUN50I_DMIC_D0D1_VOL_CTR_0L (8) + #define SUN50I_DMIC_D0D1_VOL_CTR_1R (16) + #define SUN50I_DMIC_D0D1_VOL_CTR_1L (24) +#define SUN50I_DMIC_D2D3_VOL_CTR (0x34) + #define SUN50I_DMIC_D2D3_VOL_CTR_2R (0) + #define SUN50I_DMIC_D2D3_VOL_CTR_2L (8) + #define SUN50I_DMIC_D2D3_VOL_CTR_3R (16) + #define SUN50I_DMIC_D2D3_VOL_CTR_3L (24) + #define SUN50I_DMIC_HPF_CTRL (0x38) #define SUN50I_DMIC_VERSION (0x50) @@ -273,8 +285,30 @@ static const struct of_device_id sun50i_dmic_of_match[] = { }; MODULE_DEVICE_TABLE(of, sun50i_dmic_of_match); +static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(sun50i_dmic_vol_scale, -12000, 75, 1); + +static const struct snd_kcontrol_new sun50i_dmic_controls[] = { + + SOC_DOUBLE_TLV("DMIC Channel 0 Capture Volume", SUN50I_DMIC_D0D1_VOL_CTR, + SUN50I_DMIC_D0D1_VOL_CTR_0L, SUN50I_DMIC_D0D1_VOL_CTR_0R, + 0xFF, 0, sun50i_dmic_vol_scale), + SOC_DOUBLE_TLV("DMIC Channel 1 Capture Volume", SUN50I_DMIC_D0D1_VOL_CTR, + SUN50I_DMIC_D0D1_VOL_CTR_1L, SUN50I_DMIC_D0D1_VOL_CTR_1R, + 0xFF, 0, sun50i_dmic_vol_scale), + SOC_DOUBLE_TLV("DMIC Channel 2 Capture Volume", SUN50I_DMIC_D2D3_VOL_CTR, + SUN50I_DMIC_D2D3_VOL_CTR_2L, SUN50I_DMIC_D2D3_VOL_CTR_2R, + 0xFF, 0, sun50i_dmic_vol_scale), + SOC_DOUBLE_TLV("DMIC Channel 3 Capture Volume", SUN50I_DMIC_D2D3_VOL_CTR, + SUN50I_DMIC_D2D3_VOL_CTR_3L, SUN50I_DMIC_D2D3_VOL_CTR_3R, + 0xFF, 0, sun50i_dmic_vol_scale), + + +}; + static const struct snd_soc_component_driver sun50i_dmic_component = { .name = "sun50i-dmic", + .controls = sun50i_dmic_controls, + .num_controls = ARRAY_SIZE(sun50i_dmic_controls), }; static int sun50i_dmic_runtime_suspend(struct device *dev)
The AllWinner H6 and later SoCs that sport a DMIC block contain a set of registers to control the gain (left + right) of each of the four supported channels. Add ASoC controls for changing each of the stereo channel gains using alsamixer and alike Signed-off-by: Joao Schim <joao@schimsalabim.eu> --- sound/soc/sunxi/sun50i-dmic.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)