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Mon, 29 Apr 2024 18:20:11 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 17-20020ac24851000000b00518a01fdf2asm4322096lfy.144.2024.04.29.18.20.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 18:20:10 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 30 Apr 2024 04:20:08 +0300 Subject: [PATCH RESEND 1/2] ARM: add CLIDR accessor functions MIME-Version: 1.0 Message-Id: <20240430-armv7-cacheinfo-v1-1-e3d1caa40dc5@linaro.org> References: <20240430-armv7-cacheinfo-v1-0-e3d1caa40dc5@linaro.org> In-Reply-To: <20240430-armv7-cacheinfo-v1-0-e3d1caa40dc5@linaro.org> To: Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1067; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=t8WE1+fA8j81+AJkUCcorxLRWwscCfXSF46thI/6wwA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmMEdIjLCQZ2SQ2cybmALKMcsD4fzlk7p9Q2Qnf h7P8hLmmG6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZjBHSAAKCRCLPIo+Aiko 1T0RB/wLwtHcsFKJHNF9r3i5xCA+7YDktL+lV1oTMWZBkAzXladfQXnaEabnTx/+0ZJct/rd/xr D82d2k0Ng/bxq2S+7ygkiCaqhM0Q9Z2CIl//L3Hlp0BGD7DD/8C/O96biCJKW9Br+Th/AL2yZYG cTb/V9HFpJ0N5WFgCGHHMVdZL6jbsxw+mJdoH0dx2gTMNDvla5Mmt8LRmwMoiCKEdHpcw1cadYS OVV+jgwvjrRozZebtOBPIZT1fFswWr/HMZqqUURXNueynlLSzFPKdfyE4u1jtA5mG6ZGt6u+EKy you5CNpc7ZbXiALAgaNnQvVBsy22O8svkz46TosSsyLJxFI7 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240429_182014_431276_72C1476F X-CRM114-Status: GOOD ( 10.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add functions to read the CLIDR, Cache Level ID Register. Signed-off-by: Dmitry Baryshkov --- arch/arm/include/asm/cachetype.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h index e8c30430be33..90203a6d7270 100644 --- a/arch/arm/include/asm/cachetype.h +++ b/arch/arm/include/asm/cachetype.h @@ -81,6 +81,14 @@ static inline unsigned int read_ccsidr(void) asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val)); return val; } + +static inline unsigned int read_clidr(void) +{ + unsigned int val; + + asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (val)); + return val; +} #else /* CONFIG_CPU_V7M */ #include #include "asm/v7m.h" @@ -94,6 +102,11 @@ static inline unsigned int read_ccsidr(void) { return readl(BASEADDR_V7M_SCB + V7M_SCB_CCSIDR); } + +static inline unsigned int read_clidr(void) +{ + return readl(BASEADDR_V7M_SCB + V7M_SCB_CLIDR); +} #endif #endif