From patchwork Fri May 3 15:34:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13653067 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6E6B9C4345F for ; Fri, 3 May 2024 15:35:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Eczda8MlRJ4livks4J45UzYMY8QeWhY6XM9avBRZkic=; b=FUiJTZwJD0BSGV ++kIx1AkecofJg1dYKMBmm9pjzPFZVzCzgBXZ0Z/njBfPK/FknMz9LH5pk0J5mBu1yNc9Y/t/oB+b zvqm/TUPkl8s/F8HE86YtMTgztVHhQCLa0qgO8euxOTVLqhNKPbu9Kwe3G4mC4El3tzLU759F8V+f e1G07GrKMk5TOR2XSbLdvbAEReTE7NWwfT5zEjLvReOb5qsNRlrW86cluh6PtSFIUo+K6QDAnoUzN toaIb4URZAaWTHe+rlUR3wBKNH4ZGGHqgRlcuZbczP4S6vINjbycRQt4pwrp+52hcJeIXJnCpR5de IFCkbcDih/95wFGTOInw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2uw5-0000000H3uu-3DMr; Fri, 03 May 2024 15:34:57 +0000 Received: from out-183.mta0.migadu.com ([91.218.175.183]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2uw1-0000000H3t6-4BuZ for linux-arm-kernel@lists.infradead.org; Fri, 03 May 2024 15:34:56 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1714750484; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=kXyBtcH22l6DIAru77xF46RpqXHr2mETb8HciLCvN4U=; b=YVcFcUUeMeeSarSBoZQo+aQhE0A/dDAIhhH5fjHFo6Udy/iQUc2ZoceOWU5y+c7PN/ilWj E0Z+NYIkhFUYIsA149ZLACKLyu4ALg4pWBiJ7ADHYLdl5ygIRMfTVN0c/SqaDM417t5Vkr ho0kkCYYoo6bljeVAao6Q3fFgMMLlDA= From: Sean Anderson To: Michal Simek , linux-arm-kernel@lists.infradead.org Cc: Conor Dooley , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Sean Anderson Subject: [PATCH] arm64: zynqmp: Add coresight cpu debug support Date: Fri, 3 May 2024 11:34:22 -0400 Message-Id: <20240503153422.1958812-1-sean.anderson@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240503_083454_796851_3C98CEA9 X-CRM114-Status: UNSURE ( 8.31 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add coresight debug support to the device tree. This can be useful when panicking, especially when a core is hung in EL3. Signed-off-by: Sean Anderson --- .../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 16 +++++++++++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 28 +++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index dd4569e7bd95..60d1b1acf9a0 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -70,6 +70,22 @@ &cpu0 { clocks = <&zynqmp_clk ACPU>; }; +&cpu0_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu1_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu2_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu3_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + &fpd_dma_chan1 { clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 25d20d803230..ec8d5d19ac1c 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -330,6 +330,34 @@ pmu@9000 { }; }; + cpu0_debug: debug@fec10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfec10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; + + cpu1_debug: debug@fed10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfed10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu1>; + }; + + cpu2_debug: debug@fee10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfee10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu2>; + }; + + cpu3_debug: debug@fef10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfef10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu3>; + }; + /* GDMA */ fpd_dma_chan1: dma-controller@fd500000 { status = "disabled";