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Tue, 7 May 2024 04:44:47 -0500 Received: from [127.0.1.1] (uda0497581.dhcp.ti.com [10.24.68.185]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4479iXjW117029; Tue, 7 May 2024 04:44:43 -0500 From: Manorit Chawdhry Date: Tue, 7 May 2024 15:14:29 +0530 Subject: [PATCH 2/5] arm64: dts: ti: k3-j784s4*: Remove bootph properties from parent nodes MIME-Version: 1.0 Message-ID: <20240507-b4-upstream-bootph-all-v1-2-c6d52651856f@ti.com> References: <20240507-b4-upstream-bootph-all-v1-0-c6d52651856f@ti.com> In-Reply-To: <20240507-b4-upstream-bootph-all-v1-0-c6d52651856f@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Neha Malcom Francis , Aniket Limaye , Udit Kumar , Beleswar Padhi , Manorit Chawdhry X-Mailer: b4 0.13-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1715075073; l=4211; i=m-chawdhry@ti.com; s=20231127; h=from:subject:message-id; bh=BONsjm43a6vU/CXa6qDMbtJT3z1qMQHysxnl1rgkKVs=; b=qWfF1quFikUZV/kw4uTC5muhqJroARVt53l42DYut7GYzpVQ1c+nHLe+p+RYeEK++X6K0785x FQUfzRaD/XHBfg0WX30L1mXWT3AXarPOnoofC1mnU7jbIoCqgWkk83n X-Developer-Key: i=m-chawdhry@ti.com; a=ed25519; pk=fsr6Tm39TvsTgfyfFQLk+nnqIz2sBA1PthfqqfiiYSs= X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240507_024459_694278_9A267CC7 X-CRM114-Status: GOOD ( 11.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Removes bootph-* properties from parent nodes and aligns the bootph-* to other u-boot.dtsi Signed-off-by: Manorit Chawdhry --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 10 +--------- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 6 +++--- 3 files changed, 5 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 81fd7afac8c5..f262eb1a6c65 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -279,7 +279,6 @@ &wkup_gpio0 { }; &main_pmx0 { - bootph-all; main_uart8_pins_default: main-uart8-default-pins { bootph-all; pinctrl-single,pins = < @@ -339,7 +338,6 @@ J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */ }; &wkup_pmx2 { - bootph-all; wkup_uart0_pins_default: wkup-uart0-default-pins { bootph-all; pinctrl-single,pins = < @@ -429,7 +427,6 @@ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) }; &wkup_pmx0 { - bootph-all; mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { bootph-all; pinctrl-single,pins = < @@ -449,7 +446,6 @@ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ }; &wkup_pmx1 { - bootph-all; mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins { bootph-all; pinctrl-single,pins = < @@ -520,6 +516,7 @@ bucka12: buck12 { regulator-max-microvolt = <1100000>; regulator-boot-on; regulator-always-on; + bootph-pre-ram; }; bucka3: buck3 { @@ -600,18 +597,15 @@ &ufs_wrapper { }; &fss { - bootph-all; status = "okay"; }; &ospi0 { - bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>; flash@0 { - bootph-all; compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; @@ -668,13 +662,11 @@ partition@3fc0000 { }; &ospi1 { - bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; flash@0 { - bootph-all; compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <1>; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index b67c37460a73..46bd3cd1b006 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -1120,6 +1120,7 @@ secure_proxy_main: mailbox@32c00000 { <0x00 0x32800000 0x00 0x100000>; interrupt-names = "rx_011"; interrupts = ; + bootph-all; }; hwspinlock: hwlock@30e00000 { diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 77a8d99139ec..951ff3ec3ea0 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -39,7 +39,6 @@ k3_reset: reset-controller { }; wkup_conf: bus@43000000 { - bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -171,10 +170,10 @@ mcu_timer0: timer@40400000 { ti,timer-pwm; /* Non-MPU Firmware usage */ status = "reserved"; + bootph-all; }; mcu_timer1: timer@40410000 { - bootph-all; compatible = "ti,am654-timer"; reg = <0x00 0x40410000 0x00 0x400>; interrupts = ; @@ -456,7 +455,6 @@ mcu_spi2: spi@40320000 { }; mcu_navss: bus@28380000 { - bootph-all; compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; @@ -519,6 +517,7 @@ secure_proxy_mcu: mailbox@2a480000 { * firmware on non-MPU processors */ status = "disabled"; + bootph-pre-ram; }; mcu_cpsw: ethernet@46000000 { @@ -630,6 +629,7 @@ wkup_vtm0: temperature-sensor@42040000 { <0x00 0x42050000 0x00 0x350>; power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>; #thermal-sensor-cells = <1>; + bootph-pre-ram; }; tscadc0: tscadc@40200000 {