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AJvYcCXARPq16M7brqm3ip2PGRV0OxH2FLAr84d9LotksYbK2eqb8+A8hLA3T0Gsu4/TbcYnPQQ40SLZBLWwq7JD0pAMkmL6AVRT+qIvXoHvk2btxfPpdc+i4nK7ful7gk+nnbEJifkWYoF34DTL7i3cy8nC0d+UPhbcmbE= X-Gm-Message-State: AOJu0Yx6i02e8rb/D8f/jgaapHYibmqtLbZ2z9VZSL6mDZJxp5t2YJ6p flwFRh0QQNDeZkISnngL8ZhkmIyJx0LTwLVLTNPXkjnI+Btuxy4= X-Google-Smtp-Source: AGHT+IHtoArrqD0dnvqLAhLONFA8xc0foDIiP2c2dDm/g4xMVPSUsPLYrXXxqeAb6C9ioPtRQlXv6w== X-Received: by 2002:a05:600c:354a:b0:41b:f24a:b590 with SMTP id 5b1f17b1804b1-41fbc91f3e4mr21505645e9.3.1715256446176; Thu, 09 May 2024 05:07:26 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b44:d8c3:6fa8:c46f]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fccce1912sm24112005e9.11.2024.05.09.05.07.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 May 2024 05:07:25 -0700 (PDT) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Alex Bee Subject: [PATCH v2 5/7] drm/rockchip: dsi: Add support for RK3128 Date: Thu, 9 May 2024 14:07:13 +0200 Message-ID: <20240509120715.86694-6-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240509120715.86694-1-knaerzche@gmail.com> References: <20240509120715.86694-1-knaerzche@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240509_050728_298817_690BFA4C X-CRM114-Status: GOOD ( 13.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DesignWare MIPI DSI controller found RK3128 SoCs supports up to 4 DSI data lanes. Similar to PX30/RK356x/RV1126 it uses an external D-PHY. Signed-off-by: Alex Bee --- changes since v1: - none .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index 6ed64cc35275..17fd5260218a 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c @@ -153,6 +153,11 @@ #define PX30_DSI_TURNDISABLE BIT(5) #define PX30_DSI_LCDC_SEL BIT(0) +#define RK3128_GRF_LVDS_CON0 0x0150 +#define RK3128_DSI_FORCETXSTOPMODE GENMASK(13, 10) +#define RK3128_DSI_FORCERXMODE BIT(9) +#define RK3128_DSI_TURNDISABLE BIT(8) + #define RK3288_GRF_SOC_CON6 0x025c #define RK3288_DSI0_LCDC_SEL BIT(6) #define RK3288_DSI1_LCDC_SEL BIT(9) @@ -1518,6 +1523,18 @@ static const struct rockchip_dw_dsi_chip_data px30_chip_data[] = { { /* sentinel */ } }; +static const struct rockchip_dw_dsi_chip_data rk3128_chip_data[] = { + { + .reg = 0x10110000, + .lanecfg1_grf_reg = RK3128_GRF_LVDS_CON0, + .lanecfg1 = HIWORD_UPDATE(0, RK3128_DSI_TURNDISABLE | + RK3128_DSI_FORCERXMODE | + RK3128_DSI_FORCETXSTOPMODE), + .max_data_lanes = 4, + }, + { /* sentinel */ } +}; + static const struct rockchip_dw_dsi_chip_data rk3288_chip_data[] = { { .reg = 0xff960000, @@ -1695,6 +1712,9 @@ static const struct of_device_id dw_mipi_dsi_rockchip_dt_ids[] = { { .compatible = "rockchip,px30-mipi-dsi", .data = &px30_chip_data, + }, { + .compatible = "rockchip,rk3128-mipi-dsi", + .data = &rk3128_chip_data, }, { .compatible = "rockchip,rk3288-mipi-dsi", .data = &rk3288_chip_data,