From patchwork Mon May 13 11:44:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ravi Gunasekaran X-Patchwork-Id: 13663378 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B9DFC25B10 for ; Mon, 13 May 2024 11:45:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oLhuM9t1TYm+LbBGNA/jUVLivCTTxXuya0dAK60CC4o=; b=OjysTAzZfrtQpw EUr8bCquFgtCns+j0zJKvMc35wkTFoWSLAU4AW83C2wnWao8KEyjg08tPoZXj09CyewAJ5DEiTjG3 zRWGXvemRtcTYWyY6Gtmkx36+j3PnNNGfdfinubxYlqb9WOqo0rau7+SYziQi7s6abLffluSMEZs0 WyzLwtxD/t6hkrjjGdV8G7LrP1Bnmc9nUdbN3FUNhbUYwj00v+yYwH0pr8kHAf7bQQYpUjYsiZzui kvgyUcPHSJLqKvdq2WMb0np5oMAjkjc0LY91CiQeseBsaICo0wNvPLq/VZgULy4y16tNi+IAKS9yb d5wmz8C63YWIv2AAxIZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s6U7D-0000000ChRS-1T8g; Mon, 13 May 2024 11:45:11 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s6U77-0000000ChN7-26Ct for linux-arm-kernel@lists.infradead.org; Mon, 13 May 2024 11:45:07 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 44DBj15C107614; Mon, 13 May 2024 06:45:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1715600701; bh=yGYODzhRTKhI2Q5KMHiIKKScm+LSU/cb2USphFHGmcM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=knWj2i3b8Hbx2QbaFP0ONDQwPOYPsektWCr2uBcFn+QlsgyVdyKmgNe+vnB23Osqy K800KCaIDyJrYMArhmlCD2yQAqiXfKVzg6RJY6ggPmqoFeJfi0/+yReF52Or0Ue5Hi aQkrZATTmPSuHrPtoZoYv30h8NyYt3ZQbuJwHcZE= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 44DBj1wg020296 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 13 May 2024 06:45:01 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 May 2024 06:45:00 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 May 2024 06:45:00 -0500 Received: from uda0500640.dal.design.ti.com (uda0500640.dhcp.ti.com [172.24.227.88]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44DBiiZj086026; Mon, 13 May 2024 06:44:57 -0500 From: Ravi Gunasekaran To: , , , , CC: , , , , , , , , Subject: [PATCH v2 3/3] arm64: dts: ti: k3-j722s-evm: Update USB0 and USB1 Date: Mon, 13 May 2024 17:14:43 +0530 Message-ID: <20240513114443.16350-4-r-gunasekaran@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240513114443.16350-1-r-gunasekaran@ti.com> References: <20240513114443.16350-1-r-gunasekaran@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240513_044505_683061_1A36D3CC X-CRM114-Status: GOOD ( 13.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The GPIO expander on the EVM allows the USB selection for Type-C port to either USB0 or USB1 via USB hub. By default, let the Type-C port select USB0 via the GPIO expander port P05. Enable super-speed on USB1 by updating SerDes0 lane configuration. Signed-off-by: Ravi Gunasekaran --- Changes since v1: ---------------- * Removed USB aliases, line-name property for p05 GPIO hog * Included k3-j722s-main.dtsi v1: https://lore.kernel.org/all/20240429120932.11456-1-r-gunasekaran@ti.com/ arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 55 +++++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 5 +++ arch/arm64/boot/dts/ti/k3-serdes.h | 7 ++++ 3 files changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index bf3c246d13d1..531912be97c9 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -9,7 +9,9 @@ /dts-v1/; #include +#include #include "k3-j722s.dtsi" +#include "k3-serdes.h" / { compatible = "ti,j722s-evm", "ti,j722s"; @@ -202,6 +204,12 @@ J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */ >; }; + + main_usb1_pins_default: main-usb1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0258, PIN_INPUT, 0) /* (B27) USB1_DRVVBUS */ + >; + }; }; &cpsw3g { @@ -301,6 +309,13 @@ "PCIe0_1L_RC_RSTz", "PCIe0_1L_PRSNT#", "ENET1_EXP_SPARE2", "ENET1_EXP_PWRDN", "PD_I2ENET1_I2CMUX_SELC_IRQ", "ENET1_EXP_RESETZ"; + + p05-hog { + /* P05 - USB2.0_MUX_SEL */ + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + output-high; + }; }; }; @@ -384,3 +399,43 @@ status = "okay"; bootph-all; }; + +&serdes0_ln_ctrl { + idle-states = , + ; +}; + +&serdes0 { + status = "okay"; + serdes0_usb_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz0 1>; + }; +}; + +&usbss0 { + ti,vbus-divider; + status = "okay"; +}; + +&usb0 { + dr_mode = "otg"; + usb-role-switch; +}; + +&usbss1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_pins_default>; + ti,vbus-divider; + status = "okay"; +}; + +&usb1 { + dr_mode = "host"; + maximum-speed = "super-speed"; + phys = <&serdes0_usb_link>; + phy-names = "cdns3,usb3-phy"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index c75744edb143..61b64fae1bf4 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -87,3 +87,8 @@ reg = <0x00 0x70000000 0x00 0x40000>; ranges = <0x00 0x00 0x70000000 0x40000>; }; + +/* Include bus peripherals that are additionally + * present in J722S + */ + #include "k3-j722s-main.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h index a011ad893b44..9082abeddcb1 100644 --- a/arch/arm64/boot/dts/ti/k3-serdes.h +++ b/arch/arm64/boot/dts/ti/k3-serdes.h @@ -201,4 +201,11 @@ #define J784S4_SERDES4_LANE3_USB 0x2 #define J784S4_SERDES4_LANE3_IP4_UNUSED 0x3 +/* J722S */ +#define J722S_SERDES0_LANE0_USB 0x0 +#define J722S_SERDES0_LANE0_QSGMII_LANE2 0x1 + +#define J722S_SERDES1_LANE0_PCIE0_LANE0 0x0 +#define J722S_SERDES1_LANE0_QSGMII_LANE1 0x1 + #endif /* DTS_ARM64_TI_K3_SERDES_H */