diff mbox series

[1/2] drm/rockchip: vop: clear DMA stop bit on flush on RK3066

Message ID 20240519074019.10424-1-val@packett.cool (mailing list archive)
State New
Headers show
Series [1/2] drm/rockchip: vop: clear DMA stop bit on flush on RK3066 | expand

Commit Message

Val Packett May 19, 2024, 7:31 a.m. UTC
On the RK3066, there is a bit that must be cleared on flush, otherwise
we do not get display output (at least for RGB).

Signed-off-by: Val Packett <val@packett.cool>
Cc: stable@vger.kernel.org
---
Hi! This was required to get display working on an old RK3066 tablet,
along with the next tiny patch in the series enabling the RGB output.

I have spent quite a lot of time banging my head against the wall debugging
that display (especially since at the same time a scaler chip is used for
LVDS encoding), but finally adding debug prints showed that RK3066_SYS_CTRL0
ended up being reset to all-zero after being written correctly upon init.
Looking at the register definitions in the vendor driver revealed that the
reason was pretty self-explanatory: "dma_stop".
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 +++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 1 +
 3 files changed, 5 insertions(+)

Comments

Greg KH May 19, 2024, 7:59 a.m. UTC | #1
On Sun, May 19, 2024 at 04:31:31AM -0300, Val Packett wrote:
> On the RK3066, there is a bit that must be cleared on flush, otherwise
> we do not get display output (at least for RGB).
> 
> Signed-off-by: Val Packett <val@packett.cool>
> Cc: stable@vger.kernel.org
> ---
> Hi! This was required to get display working on an old RK3066 tablet,
> along with the next tiny patch in the series enabling the RGB output.
> 
> I have spent quite a lot of time banging my head against the wall debugging
> that display (especially since at the same time a scaler chip is used for
> LVDS encoding), but finally adding debug prints showed that RK3066_SYS_CTRL0
> ended up being reset to all-zero after being written correctly upon init.
> Looking at the register definitions in the vendor driver revealed that the
> reason was pretty self-explanatory: "dma_stop".

What commit id does this fix?

thanks,

greg k-h
Val Packett May 19, 2024, 8:38 a.m. UTC | #2
On Sun, May 19 2024 at 09:59:47 +02:00:00, Greg KH 
<gregkh@linuxfoundation.org> wrote:
> On Sun, May 19, 2024 at 04:31:31AM -0300, Val Packett wrote:
>>  On the RK3066, there is a bit that must be cleared on flush, 
>> otherwise
>>  we do not get display output (at least for RGB).
> 
> What commit id does this fix?

I guess: f4a6de855e "drm: rockchip: vop: add rk3066 vop definitions" ?

But similar changes like:
742203cd "drm: rockchip: add missing registers for RK3066"
8d544233 "drm/rockchip: vop: Add directly output rgb feature for px30"
did not have any "Fixes" reference.

~val
Greg KH May 19, 2024, 8:54 a.m. UTC | #3
On Sun, May 19, 2024 at 05:38:24AM -0300, Val Packett wrote:
> 
> 
> On Sun, May 19 2024 at 09:59:47 +02:00:00, Greg KH
> <gregkh@linuxfoundation.org> wrote:
> > On Sun, May 19, 2024 at 04:31:31AM -0300, Val Packett wrote:
> > >  On the RK3066, there is a bit that must be cleared on flush,
> > > otherwise
> > >  we do not get display output (at least for RGB).
> > 
> > What commit id does this fix?
> 
> I guess: f4a6de855e "drm: rockchip: vop: add rk3066 vop definitions" ?

Great, can you add a Fixes: tag when you resend these?

> But similar changes like:
> 742203cd "drm: rockchip: add missing registers for RK3066"
> 8d544233 "drm/rockchip: vop: Add directly output rgb feature for px30"
> did not have any "Fixes" reference.

Just because people didn't properly tag things in the past, doesn't mean
you should perpetuate that problem :)

thanks,

greg k-h
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index a13473b2d..d4daeba74 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1578,6 +1578,9 @@  static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
 
 	spin_lock(&vop->reg_lock);
 
+	/* If the chip has a DMA stop bit (RK3066), it must be cleared. */
+	VOP_REG_SET(vop, common, dma_stop, 0);
+
 	/* Enable AFBC if there is some AFBC window, disable otherwise. */
 	s = to_rockchip_crtc_state(crtc->state);
 	VOP_AFBC_SET(vop, enable, s->enable_afbc);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index b33e5bdc2..0cf512cc1 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -122,6 +122,7 @@  struct vop_common {
 	struct vop_reg lut_buffer_index;
 	struct vop_reg gate_en;
 	struct vop_reg mmu_en;
+	struct vop_reg dma_stop;
 	struct vop_reg out_mode;
 	struct vop_reg standby;
 };
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index b9ee02061..9bcb40a64 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -466,6 +466,7 @@  static const struct vop_output rk3066_output = {
 };
 
 static const struct vop_common rk3066_common = {
+	.dma_stop = VOP_REG(RK3066_SYS_CTRL0, 0x1, 0),
 	.standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1),
 	.out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0),
 	.cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0),