| Message ID | 20240524210304.9164-1-fancer.lancer@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [RFC,net-next,1/3] net: stmmac: Prevent RGSMIIIS IRQs flood | expand |
On Sat, May 25, 2024 at 12:02:57AM +0300, Serge Semin wrote: > Without reading the GMAC_RGSMIIIS/MAC_PHYIF_Control_Status the IRQ line > won't be de-asserted causing interrupt handler executed over and over. As > a quick-fix let's just dummy-read the CSR for now. > > Signed-off-by: Serge Semin <fancer.lancer@gmail.com> I think it would make sense to merge these into the patches that do the conversion to avoid a git bisect hitting on a patch that causes an interrupt storm. Any objection? (I'm now converting these two in separate patches, so would need to split this patch...) Thanks.
On Tue, May 28, 2024 at 11:24:30AM +0100, Russell King (Oracle) wrote: > On Sat, May 25, 2024 at 12:02:57AM +0300, Serge Semin wrote: > > Without reading the GMAC_RGSMIIIS/MAC_PHYIF_Control_Status the IRQ line > > won't be de-asserted causing interrupt handler executed over and over. As > > a quick-fix let's just dummy-read the CSR for now. > > > > Signed-off-by: Serge Semin <fancer.lancer@gmail.com> > > I think it would make sense to merge these into the patches that do the > conversion to avoid a git bisect hitting on a patch that causes an > interrupt storm. Any objection? Of course, no objection. This patch content was intended to be merged into yours. -Serge(y) > > (I'm now converting these two in separate patches, so would need to > split this patch...) > > Thanks. > > -- > RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ > FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c index adb872d5719f..2ae8467c588e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c @@ -304,6 +304,8 @@ static int dwmac1000_irq_status(struct mac_device_info *hw, dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); if (intr_status & PCS_RGSMIIIS_IRQ) { + /* TODO Dummy-read to clear the IRQ status */ + readl(ioaddr + GMAC_RGSMIIIS); phylink_pcs_change(&hw->mac_pcs, false); x->irq_rgmii_n++; } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index a892d361a4e4..cd2ca1d0222c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -896,6 +896,8 @@ static int dwmac4_irq_status(struct mac_device_info *hw, dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); if (intr_status & PCS_RGSMIIIS_IRQ) { + /* TODO Dummy-read to clear the IRQ status */ + readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS); phylink_pcs_change(&hw->mac_pcs, false); x->irq_rgmii_n++; }
Without reading the GMAC_RGSMIIIS/MAC_PHYIF_Control_Status the IRQ line won't be de-asserted causing interrupt handler executed over and over. As a quick-fix let's just dummy-read the CSR for now. Signed-off-by: Serge Semin <fancer.lancer@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 2 ++ drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 2 ++ 2 files changed, 4 insertions(+)