diff mbox series

[2/5] dt-bindings: clock: Add i.MX91 clock definition

Message ID 20240527235158.1037971-3-pengfei.li_1@nxp.com (mailing list archive)
State New
Headers show
Series arm64: dts: freescale: Add i.MX91 11x11 EVK basic support | expand

Commit Message

Pengfei Li May 27, 2024, 11:51 p.m. UTC
i.MX91 is similar with i.MX93, only add few new clock compared to i.MX93.
Add i.MX91 related clock definition.

Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
---
 include/dt-bindings/clock/imx93-clock.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Comments

Frank Li May 28, 2024, 3:08 p.m. UTC | #1
On Mon, May 27, 2024 at 04:51:55PM -0700, Pengfei Li wrote:
> i.MX91 is similar with i.MX93, only add few new clock compared to i.MX93.
> Add i.MX91 related clock definition.
> 
> Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> ---
>  include/dt-bindings/clock/imx93-clock.h | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h
> index 787c9e74dc96..ca0785f35a46 100644
> --- a/include/dt-bindings/clock/imx93-clock.h
> +++ b/include/dt-bindings/clock/imx93-clock.h
> @@ -204,6 +204,11 @@
>  #define IMX93_CLK_A55_SEL		199
>  #define IMX93_CLK_A55_CORE		200
>  #define IMX93_CLK_PDM_IPG		201
> -#define IMX93_CLK_END			202
> +#define IMX91_CLK_ENET1_QOS_TSN     202
> +#define IMX91_CLK_ENET_TIMER        203
> +#define IMX91_CLK_ENET2_REGULAR     204
> +#define IMX91_CLK_ENET2_REGULAR_GATE		205
> +#define IMX91_CLK_ENET1_QOS_TSN_GATE		206
> +#define IMX93_CLK_END			207
>  
>  #endif
> -- 
> 2.34.1
>
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h
index 787c9e74dc96..ca0785f35a46 100644
--- a/include/dt-bindings/clock/imx93-clock.h
+++ b/include/dt-bindings/clock/imx93-clock.h
@@ -204,6 +204,11 @@ 
 #define IMX93_CLK_A55_SEL		199
 #define IMX93_CLK_A55_CORE		200
 #define IMX93_CLK_PDM_IPG		201
-#define IMX93_CLK_END			202
+#define IMX91_CLK_ENET1_QOS_TSN     202
+#define IMX91_CLK_ENET_TIMER        203
+#define IMX91_CLK_ENET2_REGULAR     204
+#define IMX91_CLK_ENET2_REGULAR_GATE		205
+#define IMX91_CLK_ENET1_QOS_TSN_GATE		206
+#define IMX93_CLK_END			207
 
 #endif