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Tue, 28 May 2024 01:20:18 -0500 From: Vineeth Karumanchi To: , , , , , , , , , , , , CC: , , , , Subject: [PATCH net-next v3 2/2] net: phy: xilinx-gmii2rgmii: Adopt clock support Date: Tue, 28 May 2024 11:50:08 +0530 Message-ID: <20240528062008.1594657-3-vineeth.karumanchi@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240528062008.1594657-1-vineeth.karumanchi@amd.com> References: <20240528062008.1594657-1-vineeth.karumanchi@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBB:EE_|SA1PR12MB6797:EE_ X-MS-Office365-Filtering-Correlation-Id: 355016f4-a5f1-4cc0-0e2e-08dc7ede4240 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|376005|7416005|1800799015|82310400017|921011; X-Microsoft-Antispam-Message-Info: VrDMoAaEWm8rshQvMg7LG4ZAtrvlUJr1sN4yoTzHrZDbISNWKCh0vgmLbR4kaFrRROAKzHOfvuL7hr4mH9gtexmhaKmCUDNfsE6qlTgLIDh9P6TcCA5bUGMKqmXZ78mJBGIRlnQOL2hFFNSzrerCmn+OhVbOCrB2fTpWvcU645B3XIdP0emHvMfJJZXKBbDnIaqybcXBpYb/maZ1B3W15uVPRBH5RrroULcG8iCL8oMpu7O8q9i+2+ZR3rE715fIKGvXJ0RhUgvtM+5Wnj1TVpe1XmoKkAdDm5TDDV86xqxy3y0Anq59HgplpNEmetYR3jGP757kREWmstPvvpSUsKuYzcP8GWJ92pev+wiJX+2XkdALFZ8Mju9hyMcxUpgcuch1/lDosRYdKdPtRI/eSrDgp/Und9hwVvBuC73xATXQ0MyIl28cwJrdZaLrkUF59l6X9cYlzo2ljmLiDvCyFKoigVz/+CPeDOUmLktmk6vohvuzeUC1vWNSuS5b7V9cyoDE+vBk6EA3pHVWm93+pPvGeWgR4UphXogiR52xEquxNCDU2nytD1q3NjE3OrDpXDMTIG6JMLD51FfEUbNb3VaJOrdMm/wl+/2gaO3lxNd3l4pGVM+4N/MJIYYCM64m6jRNq/eNVnpnIhnhZltT6XZC1LQQ7ShxaI/toPxgKwCwXRkqbNNt/DVl5xyIzzjwaKqf1St3ZKQReHTxV2bakLgA6/SybUnRyTeuhfibpvZ0mKJX3/K3NogNFV83AnPOcGjxWcV7VyA6dHe8CvGmSeJAmlW3j6qZ3/CBHXJBmutt78hw7T4Gy7C/ed9QnGB6ETUOLhwy87Woin2Uao1msjMb4oLF8KZHlVEWkTqudOysjyI5BNMYBxS6V9YY2yDDWjqro0Xk+RneKPd0ssfwGjiY563IWH9bvnrng2ETWC2QbWAA2S0Dnjc51eQPIohh30DfcXBGtLa2lgGU9jz04hK6s7Jy3Nv1lkA/z8Cek8yClnR7FsDJmS4LUbaWMF3T8yqKgNGKMsNz2onp/xmOS2uoEbZweS8GTYlfsN842PGr1/Lq5KxLct5/WGZh78TngR49COpqp4F5ts1xTR//MtmwTVW7X37/rb+mhx6qoLHPWNhR4zVGCRTuhG0LKkuar5VfokYJWt2LjKL/ikj1EnVqRoBKGlHnmiFp9bv8GSRGZM/pQ03+gU5Po2/9I5EEwNMlr737haH4RWUaoudnNVp7fvC6Z2DaMBuDfUn4MJ+dzGduOt9A2lPVNjChQLZUik9M6fDN4bFXPW6gf/ZedHTKMQi1f7V3hP8Zv3QV5C4vrnygCMHv+JreH21hnTiUpFl+d9WbCBdwoxMfP97KX3hoDgQXBl24tsUFXuboi6pYQEbk/9d8JblzViEAHwS6 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(36860700004)(376005)(7416005)(1800799015)(82310400017)(921011);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2024 06:20:23.8632 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 355016f4-a5f1-4cc0-0e2e-08dc7ede4240 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6797 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240527_232034_265988_5EA24B7C X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add clock support to the gmii_to_rgmii IP. Make clk optional to keep DTB backward compatibility. Signed-off-by: Vineeth Karumanchi Reviewed-by: Wojciech Drewek --- drivers/net/phy/xilinx_gmii2rgmii.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c index 7b1bc5fcef9b..7c51daecf18e 100644 --- a/drivers/net/phy/xilinx_gmii2rgmii.c +++ b/drivers/net/phy/xilinx_gmii2rgmii.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #define XILINX_GMII2RGMII_REG 0x10 @@ -85,11 +86,17 @@ static int xgmiitorgmii_probe(struct mdio_device *mdiodev) struct device *dev = &mdiodev->dev; struct device_node *np = dev->of_node, *phy_node; struct gmii2rgmii *priv; + struct clk *clkin; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; + clkin = devm_clk_get_optional_enabled(dev, NULL); + if (IS_ERR(clkin)) + return dev_err_probe(dev, PTR_ERR(clkin), + "Failed to get and enable clock from Device Tree\n"); + phy_node = of_parse_phandle(np, "phy-handle", 0); if (!phy_node) { dev_err(dev, "Couldn't parse phy-handle\n");