From patchwork Thu May 30 15:10:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13680529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AF8AC27C44 for ; Thu, 30 May 2024 15:11:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FZmLlCP/cVgfHthJgx074HL5KIC/QqZ5DhYFZQEMVu0=; b=pXbLSlyzzBzAzZ cwbFYcNxWCXF2s9GopQ1PBa5lu/vcDg9fKIe/Ckw/Kh3aOwejJePVtQQZ+HT0G8d2ADR/iyjrFYn+ vJPgB+/AEcxC22GZeoj1YT94db5etCbRFmk9mqAMIPTEYhr7IOliviZn0J6irhGfKpR6D8JiDHmYF xzQWljE52SXnWc3e618mUxaVlvlWNSZMk2t9doqtYRng7el4cgyJBWc/p1l9aSJk7pxYr5Bcq6Npx rKhVIjqTQDj7nWjzHTmw/X5LbTq3en+lYCCth6U4kTQK8UTswn1S79fuCIEPY3xxa561rc7FFqppg 2nqEOkSWr/2gjpDyMeCg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sChRC-00000007eqA-0BLi; Thu, 30 May 2024 15:11:30 +0000 Received: from mgamail.intel.com ([192.198.163.8]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sChR8-00000007en1-1G6Z for linux-arm-kernel@lists.infradead.org; Thu, 30 May 2024 15:11:27 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717081886; x=1748617886; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Iq9RkCVt6cK9FjvsEVBSiepSsecDquk00YCQe7trEiE=; b=glmv71E/LrOiaAsnLDpfyZJNyIajmztOndG666brTPqYcm3ZGeh3de3b DKr7tl4mPiOpo8oux2rlq9qXfTxktlUBlZSZIgx4Lq7X7qfUcWEU/8/o8 wjwywvgP6oMNwBc+d7/KWF3V4ng7/Gc8uWIqgq+HQy4XfnB2BnqRCJzbQ QbRDKdPWCcA7PqLaWTUUIQm52MbD0PjOHsUW6q76bl64ni/ByagrBBHoD 3955qHe/NJWQ7A5XZbHNiLQzoCT+uotYnTSIoiUsBXsHljiWHhUulKRLB oIlOPZ2LxZk0+s9v9mTwkhDUaGYAGgefx11smVc3G1tXqzO1P4iS6OPvx g==; X-CSE-ConnectionGUID: CK2Mv83PQS2O/6Ll1q3jcw== X-CSE-MsgGUID: L2NfNoiyQ8WZI2qt2fbsQA== X-IronPort-AV: E=McAfee;i="6600,9927,11088"; a="31093037" X-IronPort-AV: E=Sophos;i="6.08,201,1712646000"; d="scan'208";a="31093037" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 May 2024 08:11:22 -0700 X-CSE-ConnectionGUID: G8o5fUUqTo2Es22qCMzxKg== X-CSE-MsgGUID: /TE0xF6cRluJM0rR4Vu7wg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,201,1712646000"; d="scan'208";a="40288500" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa005.fm.intel.com with ESMTP; 30 May 2024 08:11:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 4322937D; Thu, 30 May 2024 18:11:19 +0300 (EEST) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , Linus Walleij , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik Subject: [PATCH v2 04/11] spi: pxa2xx: Remove hard coded number of chip select pins Date: Thu, 30 May 2024 18:10:00 +0300 Message-ID: <20240530151117.1130792-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240530151117.1130792-1-andriy.shevchenko@linux.intel.com> References: <20240530151117.1130792-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240530_081126_382848_4615BE40 X-CRM114-Status: GOOD ( 12.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove hard coded number of chip select pins for Intel Braswell. This comes via property. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-pxa2xx.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index b62a613378e0..53815aab41aa 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -99,7 +99,6 @@ struct lpss_config { /* Chip select control */ unsigned cs_sel_shift; unsigned cs_sel_mask; - unsigned cs_num; /* Quirks */ unsigned cs_clk_stays_gated : 1; }; @@ -137,7 +136,6 @@ static const struct lpss_config lpss_platforms[] = { .tx_threshold_hi = 224, .cs_sel_shift = 2, .cs_sel_mask = 1 << 2, - .cs_num = 2, }, { /* LPSS_SPT_SSP */ .offset = 0x200, @@ -1594,8 +1592,6 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) tmp &= LPSS_CAPS_CS_EN_MASK; tmp >>= LPSS_CAPS_CS_EN_SHIFT; platform_info->num_chipselect = ffz(tmp); - } else if (config->cs_num) { - platform_info->num_chipselect = config->cs_num; } } controller->num_chipselect = platform_info->num_chipselect;