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AJvYcCXzcQP4Dq1oT9TrugFOnbxBB4d1EvKCtkY5Habkdd81VGGKnYWVONaChUiy661wTUwNCKfh3+caPt+EMOpZG/kdhf74Gh09yqilVoHKVTwAuy2C89c= X-Gm-Message-State: AOJu0Yx8+HxTNPqTVfuJ+Vn/i4p8rDFzup9TSns5UN7J39FBtKroKsWu Wl/zSk4JBqKujwcks7Bejb9y/kncjF1/Wf81U6RzPvRSZYlyIuPv X-Google-Smtp-Source: AGHT+IED1pv9oGjdH+Ngk5fD7H3whpkkw+4F3I2DkC4Ur7bEQ6LnfE0ADN36jmtn6xY3QZI+rCQlyw== X-Received: by 2002:a05:6a21:33a3:b0:1b2:6b27:5cac with SMTP id adf61e73a8af0-1b26f1f73b5mr2415856637.32.1717164755418; Fri, 31 May 2024 07:12:35 -0700 (PDT) Received: from noel.flets-west.jp ([2405:6586:4480:a10:167:9818:d778:5c14]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b057besm1418103b3a.162.2024.05.31.07.12.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 07:12:35 -0700 (PDT) From: Hironori KIKUCHI To: linux-kernel@vger.kernel.org Cc: Hironori KIKUCHI , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Aleksandr Shubin , Cheo Fusi , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH 5/5] dt-bindings: pwm: sun20i: Add options to select a clock source and DIV_M Date: Fri, 31 May 2024 23:11:37 +0900 Message-ID: <20240531141152.327592-6-kikuchan98@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240531141152.327592-1-kikuchan98@gmail.com> References: <20240531141152.327592-1-kikuchan98@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240531_071237_883198_2F0D9918 X-CRM114-Status: GOOD ( 10.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds new options to select a clock source and DIV_M register value for each coupled PWM channels. Signed-off-by: Hironori KIKUCHI --- .../bindings/pwm/allwinner,sun20i-pwm.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml index b9b6d7e7c87..436a1d344ab 100644 --- a/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml @@ -45,6 +45,25 @@ properties: description: The number of PWM channels configured for this instance enum: [6, 9] + allwinner,pwm-pair-clock-sources: + description: The clock source names for each PWM pair + items: + enum: [hosc, apb] + minItems: 1 + maxItems: 8 + + allwinner,pwm-pair-clock-prescales: + description: The prescale (DIV_M register) values for each PWM pair + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + minimum: 0 + maximum: 8 + minItems: 1 + maxItems: 1 + minItems: 1 + maxItems: 8 + allOf: - $ref: pwm.yaml#