From patchwork Sun Jun 9 12:59:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13691247 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7ECFC27C53 for ; Sun, 9 Jun 2024 13:01:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1k5arhQcrwtROBT5kG0Swq7NpbgVeMNk+cqe7mTRiBA=; b=VXvolhCJTFRsYP WYwX2LMi8FuvgJRqF0zEwjJ5KmlK82ts61IBYTsvEuhFh5FYgLoy7XQFwa2TV25Y+RqLmtlySpCfZ biZGMPrDaUuiYGyFPs4UBM0UWamemJdGUsZT+IuUK3jbrGP0pCNhVkftHN1PKuVfQC1QWV2QUZ11+ IIuzqZ0K9ikPmghxZbWClkrD6jFPxdydrMtAUp2FLxQAHKNb5dzZzwWBugA6Caw+ehRGsODVplui/ GVP1eHCKESkYKd7pO+CtYg/BBum/0Znlsayi8yV4aKO1KYRbUznYC91qVAO52Se5F3XbluTZ5KAXO iB2lNkeWorl+xSbzm3mw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sGIAg-00000002bwe-0vTC; Sun, 09 Jun 2024 13:01:18 +0000 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sGIAd-00000002bve-1at8 for linux-arm-kernel@lists.infradead.org; Sun, 09 Jun 2024 13:01:17 +0000 Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-a6ef793f4b8so187726766b.1 for ; Sun, 09 Jun 2024 06:01:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717938074; x=1718542874; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=roddXwv5d465/lxlFzMrZn0lrN/Jz4rrWHyGURYshMc=; b=ZkoViWuAYx7i33uhiuhwHCZoerhckTzjDdqY2kcL6LAdw5bZbNrZAAuSDTi6PoEtfE wv9hnnowmF4vbONPHgfeks5QkezD23kbvQNzCiFfFXs8Wd7Bpi3Z/4JXrXkHpUw/sDrG 3vuSAFvQlCJVfst8rmp74KMpo8Yiv7+k6mTeb0u6W1jQT4EyphMA1GQ/UOS9GY6a0VeK mrpdxJv1+9q6KIRzUszrNu2eHInuSM80J1zTfmb3CKTJYDH4ycni2IQN5o1CoE+xTZlD JrcGdbWW5sgjeOLyNHRilV/TgMr4RrZGsTLS1o9/IN7VQ7USuKhLTQepXSYRXJVh5VRj TdnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717938074; x=1718542874; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=roddXwv5d465/lxlFzMrZn0lrN/Jz4rrWHyGURYshMc=; b=lYttd+Xv9xF/48JIrcyVJAJKTWeIStICVFtGiPnJFFTaAh3ys8W6a9O8inZP2UBkyn iyg8l6W+OsZ0Ar/EWJVbDzGHV39Hf9HGnoWWK7BFVz5+O7qEkkxu+vOY/unE21V6QrLl TC1RAM8edgAAm2/5n2pDVZBpNrRon8zZwbW/d1Sd+zNGfkXQOBudiSnEOh/zZ/7nivdZ GrphAKJHbttXIrsRb5BfylmBrCRxA4ywZxskIK6HmQy5xTSa+JUM+pPv8iG0RlhtK0wE 5Lp5KlzrHrne+zixR8J5St8YLnzMQcwdzgKwrKdpmgBEwDfAOA3jzI8AnO0H5fmUrS7r 7GrA== X-Forwarded-Encrypted: i=1; AJvYcCXnl1I4Zv87L8qldTVCT0Nu6nmMTo/5vgAg3PvXVqPcKbTc7tUMHClxjCtV7l544UgUnILT2c+1FErS+MNC5wHte1zkkbkCvHoDDfUJ8KfGSqB1bxk= X-Gm-Message-State: AOJu0YyWzhliT93phfeJFQdZQNXtKCAz45HoLP5ZV+dkRxEQZGdv4TOq G5Gtf1hYq04txYSfB6PU1bepax9Pw9HZlBVYF/q9K86Ro1LVWf9X X-Google-Smtp-Source: AGHT+IGreRkBONukfacHwv3hN2S0XEX0TDLoo4NDkaB14N8SCtzAN4GtduaJrUVGiB3CjataKqHrAQ== X-Received: by 2002:a17:906:1752:b0:a6e:facf:f982 with SMTP id a640c23a62f3a-a6efacffa1emr277059466b.23.1717938073841; Sun, 09 Jun 2024 06:01:13 -0700 (PDT) Received: from lmc-playground.localdomain ([188.25.209.252]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f1841fceasm85961266b.70.2024.06.09.06.01.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Jun 2024 06:01:13 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Philipp Zabel , Liu Ying , Sascha Hauer Cc: laurentiu.mihalcea@nxp.com, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] reset: add driver for imx8ulp SIM reset controller Date: Sun, 9 Jun 2024 15:59:00 +0300 Message-Id: <20240609125901.76274-3-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240609125901.76274-1-laurentiumihalcea111@gmail.com> References: <20240609125901.76274-1-laurentiumihalcea111@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240609_060115_558973_9A40AD31 X-CRM114-Status: GOOD ( 23.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Laurentiu Mihalcea Certain components can be reset via the SIM module. Add reset controller driver for the SIM module to allow drivers for said components to control the reset signal(s). Signed-off-by: Liu Ying Signed-off-by: Laurentiu Mihalcea --- drivers/reset/Kconfig | 7 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-imx8ulp-sim.c | 103 ++++++++++++++++++ include/dt-bindings/reset/imx8ulp-sim-reset.h | 16 +++ 4 files changed, 127 insertions(+) create mode 100644 drivers/reset/reset-imx8ulp-sim.c create mode 100644 include/dt-bindings/reset/imx8ulp-sim-reset.h diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 7112f5932609..9b3574a4f1c6 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -91,6 +91,13 @@ config RESET_IMX7 help This enables the reset controller driver for i.MX7 SoCs. +config RESET_IMX8ULP_SIM + tristate "i.MX8ULP SIM Reset Driver" + depends on ARCH_MXC + help + This enables the SIM (System Integration Module) reset driver + for i.MX8ULP SoC. + config RESET_INTEL_GW bool "Intel Reset Controller Driver" depends on X86 || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index fd8b49fa46fc..f257d6a41f1e 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -42,3 +42,4 @@ obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o +obj-$(CONFIG_RESET_IMX8ULP_SIM) += reset-imx8ulp-sim.o diff --git a/drivers/reset/reset-imx8ulp-sim.c b/drivers/reset/reset-imx8ulp-sim.c new file mode 100644 index 000000000000..d1b9511a5c6a --- /dev/null +++ b/drivers/reset/reset-imx8ulp-sim.c @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2024 NXP + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define AVD_SIM_SYSCTRL0 0x8 + +struct imx8ulp_sim_reset { + struct reset_controller_dev rcdev; + struct regmap *regmap; +}; + +static const u32 imx8ulp_sim_reset_bits[IMX8ULP_SIM_RESET_NUM] = { + [IMX8ULP_SIM_RESET_MIPI_DSI_RST_DPI_N] = BIT(3), + [IMX8ULP_SIM_RESET_MIPI_DSI_RST_ESC_N] = BIT(4), + [IMX8ULP_SIM_RESET_MIPI_DSI_RST_BYTE_N] = BIT(5), +}; + +static inline struct imx8ulp_sim_reset * +to_imx8ulp_sim_reset(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct imx8ulp_sim_reset, rcdev); +} + +static int imx8ulp_sim_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct imx8ulp_sim_reset *simr = to_imx8ulp_sim_reset(rcdev); + const u32 bit = imx8ulp_sim_reset_bits[id]; + + return regmap_update_bits(simr->regmap, AVD_SIM_SYSCTRL0, bit, 0); +} + +static int imx8ulp_sim_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct imx8ulp_sim_reset *simr = to_imx8ulp_sim_reset(rcdev); + const u32 bit = imx8ulp_sim_reset_bits[id]; + + return regmap_update_bits(simr->regmap, AVD_SIM_SYSCTRL0, bit, bit); +} + +static const struct reset_control_ops imx8ulp_sim_reset_ops = { + .assert = imx8ulp_sim_reset_assert, + .deassert = imx8ulp_sim_reset_deassert, +}; + +static const struct of_device_id imx8ulp_sim_reset_dt_ids[] = { + { .compatible = "nxp,imx8ulp-avd-sim-reset", }, + { /* sentinel */ }, +}; + +static int imx8ulp_sim_reset_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct imx8ulp_sim_reset *simr; + int ret; + + simr = devm_kzalloc(dev, sizeof(*simr), GFP_KERNEL); + if (!simr) + return -ENOMEM; + + simr->regmap = syscon_node_to_regmap(dev->of_node); + if (IS_ERR(simr->regmap)) { + ret = PTR_ERR(simr->regmap); + dev_err(dev, "failed to get regmap: %d\n", ret); + return ret; + } + + simr->rcdev.owner = THIS_MODULE; + simr->rcdev.nr_resets = IMX8ULP_SIM_RESET_NUM; + simr->rcdev.ops = &imx8ulp_sim_reset_ops; + simr->rcdev.of_node = dev->of_node; + + ret = devm_of_platform_populate(dev); + if (ret) + return ret; + + return devm_reset_controller_register(dev, &simr->rcdev); +} + +static struct platform_driver imx8ulp_sim_reset_driver = { + .probe = imx8ulp_sim_reset_probe, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = imx8ulp_sim_reset_dt_ids, + }, +}; +module_platform_driver(imx8ulp_sim_reset_driver); + +MODULE_AUTHOR("Liu Ying "); +MODULE_DESCRIPTION("NXP i.MX8ULP System Integration Module Reset driver"); +MODULE_LICENSE("GPL"); diff --git a/include/dt-bindings/reset/imx8ulp-sim-reset.h b/include/dt-bindings/reset/imx8ulp-sim-reset.h new file mode 100644 index 000000000000..9f8fb8680a5e --- /dev/null +++ b/include/dt-bindings/reset/imx8ulp-sim-reset.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ + +/* + * Copyright 2024 NXP + */ + +#ifndef DT_BINDINGS_RESET_IMX8ULP_SIM_H +#define DT_BINDINGS_RESET_IMX8ULP_SIM_H + +#define IMX8ULP_SIM_RESET_MIPI_DSI_RST_DPI_N 0 +#define IMX8ULP_SIM_RESET_MIPI_DSI_RST_ESC_N 1 +#define IMX8ULP_SIM_RESET_MIPI_DSI_RST_BYTE_N 2 + +#define IMX8ULP_SIM_RESET_NUM 3 + +#endif /* DT_BINDINGS_RESET_IMX8ULP_SIM_H */