From patchwork Wed Jun 12 13:24:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13694998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F1D3C27C53 for ; Wed, 12 Jun 2024 13:24:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vGc+fat9nc8+VCA0oCzkpSgDuduad3FnihdjvadOs+E=; b=IRShb3ikLu/5d7MnRtP6xWDrW9 gI8aTQ9R8oOwSoPoWt+c91MDgiqEIJ8kxGuSt/ckZL0EFmR6x8cAzM639g8GSnWl3pQLbVLJLRGk5 hRid/Rptp+zp4ycOIH3gy/xd+LXmz0yAqJybzYFHQe1i9pQ8+zRR3TcTgY2ZWBEl9Lt2IOG68Ik7G 07G4YshLELB/6Gnrez9Soeo+kSo15/hmhWiJQH7a0NU6zlugInJEan3VJUEQdkZrvh4X9fKG9+Bx8 qw/ZApCuTcVlCnPGmesq0wW+VwXmIPqMHnz55nDaoGHjps8o3sZfmxcMLdy/l77JI6uOe0xVgzshy 1ABDQ/Ag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sHNxv-0000000Cj15-2hx6; Wed, 12 Jun 2024 13:24:39 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sHNxo-0000000CivV-1Nuy for linux-arm-kernel@lists.infradead.org; Wed, 12 Jun 2024 13:24:34 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45CDOSQR079189; Wed, 12 Jun 2024 08:24:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1718198668; bh=vGc+fat9nc8+VCA0oCzkpSgDuduad3FnihdjvadOs+E=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=CSJFppOgPwUpiqT7kzy2t9nbuNywBDEbFnuPgunjwPRFPSEfairzkuzblzJCZGmQ2 4Gm08UrjNSOEizNgxU/T4g/UfvRAphTtb8wI4rRbcux2GDeK1VLlcqMhI4nsR6O5NL EJIv9TyQC+tqgS9bRy6pxQ5aUPiF9ZgTOqEhj6sA= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45CDOS9s094616 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 12 Jun 2024 08:24:28 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 12 Jun 2024 08:24:28 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 12 Jun 2024 08:24:28 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45CDOAmt046478; Wed, 12 Jun 2024 08:24:24 -0500 From: Siddharth Vadapalli To: , , , , , , , CC: , , , , , , Subject: [PATCH v6 3/8] arm64: dts: ti: k3-j722s: Add main domain peripherals specific to J722S Date: Wed, 12 Jun 2024 18:54:04 +0530 Message-ID: <20240612132409.2477888-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240612132409.2477888-1-s-vadapalli@ti.com> References: <20240612132409.2477888-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240612_062432_501538_A6986E4A X-CRM114-Status: GOOD ( 14.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce the "k3-j722s-main.dtsi" file to contain main domain peripherals that are specific to J722S SoC and are not shared with AM62P. The USB1 instance of the USB controller on J722S is different from that on AM62P. Thus, add the USB1 node in "k3-j722s-main.dtsi". Co-developed-by: Ravi Gunasekaran Signed-off-by: Ravi Gunasekaran Signed-off-by: Siddharth Vadapalli Acked-by: Roger Quadros --- v5: https://lore.kernel.org/r/20240604085252.3686037-4-s-vadapalli@ti.com/ Changes since v5: - Collected Acked-by tag from Roger Quadros arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 40 +++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi new file mode 100644 index 000000000000..84378fc839d6 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Device Tree file for the J722S MAIN domain peripherals + * + * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +&cbass_main { + usbss1: usb@f920000 { + compatible = "ti,j721e-usb"; + reg = <0x00 0x0f920000 0x00 0x100>; + power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 278 3>, <&k3_clks 278 1>; + clock-names = "ref", "lpm"; + assigned-clocks = <&k3_clks 278 3>; /* USB2_REFCLK */ + assigned-clock-parents = <&k3_clks 278 4>; /* HF0SC0 */ + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + usb1: usb@31200000{ + compatible = "cdns,usb3"; + reg = <0x00 0x31200000 0x00 0x10000>, + <0x00 0x31210000 0x00 0x10000>, + <0x00 0x31220000 0x00 0x10000>; + reg-names = "otg", + "xhci", + "dev"; + interrupts = , /* irq.0 */ + , /* irq.6 */ + ; /* otgirq */ + interrupt-names = "host", + "peripheral", + "otg"; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + }; +};