Message ID | 20240614071932.1014067-12-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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([82.78.167.189]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42286eef9eesm87272555e9.9.2024.06.14.00.20.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jun 2024 00:20:13 -0700 (PDT) From: Claudiu <claudiu.beznea@tuxon.dev> X-Google-Original-From: Claudiu <claudiu.beznea.uj@bp.renesas.com> To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, alexandre.belloni@bootlin.com, magnus.damm@gmail.com Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, claudiu.beznea@tuxon.dev, Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Subject: [PATCH 11/12] arm64: defconfig: Enable VBATTB clock flag Date: Fri, 14 Jun 2024 10:19:31 +0300 Message-Id: <20240614071932.1014067-12-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240614071932.1014067-1-claudiu.beznea.uj@bp.renesas.com> References: <20240614071932.1014067-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240614_002016_444538_14D5227E X-CRM114-Status: UNSURE ( 8.09 ) X-CRM114-Notice: Please train this message. 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Add RTC support for the Renesas RZ/G3S SoC
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expand
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diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 05abba0a0209..fcb0c7ee8769 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1348,6 +1348,7 @@ CONFIG_SM_VIDEOCC_8250=y CONFIG_QCOM_HFPLL=y CONFIG_CLK_GFM_LPASS_SM8250=m CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y +CONFIG_CLK_VBATTB=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_TEGRA186_TIMER=y