From patchwork Fri Jun 14 07:19:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu X-Patchwork-Id: 13697968 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B2ADCC27C77 for ; Fri, 14 Jun 2024 07:20:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=KasawgVYyRihhmap9sWeLzVl10rVjnzHePrPG2MZMwM=; b=edAtIeEZSrG62+ga+C6Almb9Yu a/GFGUy/l+ukJJtH/i210oU/8dMO+bzFb8Ujg5uS6ujDiHu9ibGRQMlWnWAbmbPwJ5JDtPssFq+mg vSkUOLzp1h2NazSJiXHla/2WI9S0DhFQCtV2SfSe1cFcxDw+sktAah30njukqwogSFx9wOihURnhI 6x+vqo+h33WwFvgn8vuusFAXrzK9on748sWgArwW0Djgk4BergBXyQM8TqVodJqP57i314Doqwz3n Uyw6V1mqcJTN0UXMVahwD7zYp2YEGFtPrnDm4Q4ndMsRtsPpRGvSHgQDQ0Wy726SkIpmT5RG8ZhDn 8qY03A9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sI1E9-00000001jRZ-2g1N; Fri, 14 Jun 2024 07:20:01 +0000 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sI1E2-00000001jOL-2mLP for linux-arm-kernel@lists.infradead.org; Fri, 14 Jun 2024 07:19:55 +0000 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-42172ed3597so11473835e9.0 for ; Fri, 14 Jun 2024 00:19:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1718349591; x=1718954391; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KasawgVYyRihhmap9sWeLzVl10rVjnzHePrPG2MZMwM=; b=AInLh+KtK+aFdmwOIAgqhPBxOYlLSQ+dtJ0cH0HaMxOBpULxolaKa+1rPkQWhKwLS1 6AfSL5xsR9XrJ5NabhEU28hilswbUL4qdwFu3YRFx7CSgEf4ciZVyoLaqJwMtz6HvSQU 4qnsfVQDps+OnPs6xib+HhlucxJ0IYKhbqrUe6Nai84Qe3YlSQcr7195cOlPG2alumKT O2YDNRqwRQYQMtLMbRZdByiNgp13kLrfuampUidV/+Nmq1ulQQuf7N+RAah0k5XuO+0E K1LqEBsncFudh2GBsUglYLx+QmKRL0MkrbOZ0uBvgkMA/6RQ5ireA3snnWfiwV+gjHZG JuOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718349591; x=1718954391; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KasawgVYyRihhmap9sWeLzVl10rVjnzHePrPG2MZMwM=; b=snM0MeDUOGR7vHj6KfLmWHeT9qFS5htVHDOPteEo5mKp68Tk3RWCjHQHDJGH5qP4EB Jo0O60xJkPrc8WI2G+XiTnL+Zh3bMlHq15HVnEqF5JBZKfcAYMuQLmLWTXqJ0h3DBrUO v4zvdsGeERoG/Lq/lhW6g1BVKcnqE58YgUn+O2399KxRRV5H7nva1cwMj0Gw0aCeDJvo w0WNOPdXu/jzF1FTkfhkquGKWUDCUHK8jIBePNNRL2tVRbl5F4uAZGxzNaD27DAW0Cxj ol8skrAY5hW5JvL0/p1BOdjS13jxHfbk0x2VpKSy7QU7vYghsWdGiPYu3fb0K4voko1d WeSg== X-Forwarded-Encrypted: i=1; AJvYcCXb9BroGr8aur2jMr9GsR9yuEgpM032bu7HpR0naEsNU7PnBussA1t/Vs+LkCZfIyRxHLh0je3P3u2jtz8oGmJLnOhUGcxqU8abG6jAqiQGAfRe3yo= X-Gm-Message-State: AOJu0YxUgLfJVUghwXFk9i/FM2bntLsEq67jeZSMJA1975zlepm40ax0 ZtyNLEImq/WXaoXGb+6w47f7LD0CRsNQDf1bzJZh/pID7tI9P5H7q7FSPNJfl9g= X-Google-Smtp-Source: AGHT+IFm9u8DBlylzRCM4uhJJE2E99q1w8J+jbzBLdvMg/1gVqKsZ7fS/hjqLa586dIEhzPS6xfzCg== X-Received: by 2002:a05:600c:19cf:b0:421:7ab8:59c with SMTP id 5b1f17b1804b1-42304825ce7mr19505375e9.10.1718349591097; Fri, 14 Jun 2024 00:19:51 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.189]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42286eef9eesm87272555e9.9.2024.06.14.00.19.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jun 2024 00:19:50 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, alexandre.belloni@bootlin.com, magnus.damm@gmail.com Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH 01/12] clk: renesas: r9a08g045: Add clock, reset and power domain support for the VBATTB IP Date: Fri, 14 Jun 2024 10:19:21 +0300 Message-Id: <20240614071932.1014067-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240614071932.1014067-1-claudiu.beznea.uj@bp.renesas.com> References: <20240614071932.1014067-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240614_001954_737929_A8891B8F X-CRM114-Status: GOOD ( 10.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Claudiu Beznea The Renesas RZ/G3S SoC has an IP named Battery Backup Function (VBATTB) that generates the RTC clock. Add clock, reset and power domain support for it. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- drivers/clk/renesas/r9a08g045-cpg.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c index b068733b145f..2ae97c29c377 100644 --- a/drivers/clk/renesas/r9a08g045-cpg.c +++ b/drivers/clk/renesas/r9a08g045-cpg.c @@ -215,6 +215,7 @@ static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = { DEF_MOD("eth1_refclk", R9A08G045_ETH1_REFCLK, R9A08G045_CLK_HP, 0x57c, 9), DEF_MOD("scif0_clk_pck", R9A08G045_SCIF0_CLK_PCK, R9A08G045_CLK_P0, 0x584, 0), DEF_MOD("gpio_hclk", R9A08G045_GPIO_HCLK, R9A08G045_OSCCLK, 0x598, 0), + DEF_MOD("vbat_bclk", R9A08G045_VBAT_BCLK, R9A08G045_OSCCLK, 0x614, 0), }; static const struct rzg2l_reset r9a08g045_resets[] = { @@ -231,6 +232,7 @@ static const struct rzg2l_reset r9a08g045_resets[] = { DEF_RST(R9A08G045_GPIO_RSTN, 0x898, 0), DEF_RST(R9A08G045_GPIO_PORT_RESETN, 0x898, 1), DEF_RST(R9A08G045_GPIO_SPARE_RESETN, 0x898, 2), + DEF_RST(R9A08G045_VBAT_BRESETN, 0x914, 0), }; static const unsigned int r9a08g045_crit_mod_clks[] __initconst = { @@ -238,6 +240,7 @@ static const unsigned int r9a08g045_crit_mod_clks[] __initconst = { MOD_CLK_BASE + R9A08G045_IA55_PCLK, MOD_CLK_BASE + R9A08G045_IA55_CLK, MOD_CLK_BASE + R9A08G045_DMAC_ACLK, + MOD_CLK_BASE + R9A08G045_VBAT_BCLK, }; static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = { @@ -275,6 +278,9 @@ static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = { DEF_PD("scif0", R9A08G045_PD_SCIF0, DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(1)), RZG2L_PD_F_NONE), + DEF_PD("vbat", R9A08G045_PD_VBAT, + DEF_REG_CONF(CPG_BUS_MCPU3_MSTOP, BIT(8)), + RZG2L_PD_F_ALWAYS_ON), }; const struct rzg2l_cpg_info r9a08g045_cpg_info = {