From patchwork Tue Jun 18 17:31:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13702799 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD86AC27C4F for ; Tue, 18 Jun 2024 17:32:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TpptANxAKQ/YzWp6VLz1yfMEiiZrROXM3asZbo6gXXE=; b=DXDokZibT6B1m4GR4tIrR8a/SX W206K9f041hHe+tVl4qN0mZfU11LPRGBXAxiF8o7DMgG0cglZFePACMTOWPKlmKPoXy2SJay5jmwb ZJvGUnjNJxEPwnHjaWKXVB3Ejj/e+k05aKnw0stYBxeCKwbQ+XSWdUf96cAiyNkGcXKZoAw6xIJVF kLAcADd5IuvwthIwaVkaHX4jlHxt7WagSSkdr/CCy5PucKsj/8seZvpLgGbAFq3n/T/PFxQhr7d42 BzU6PtiKhZJRo4mmVLENnA55mcmkcHUzLEbjoh54IC73av7u/PsBT4dLBnUNb2urrvmfaOUbYO2NE KZb4+VRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJcgO-0000000G2WT-44WR; Tue, 18 Jun 2024 17:31:48 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJcg7-0000000G2Na-19dz for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2024 17:31:33 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45IHVQVc089668; Tue, 18 Jun 2024 12:31:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1718731886; bh=TpptANxAKQ/YzWp6VLz1yfMEiiZrROXM3asZbo6gXXE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PpMFgl0rFTRHjnqoyY6MNrdqdhVERSlQIQpQNkGkbQHpxy/Yuw56G0JTDfrrqgl9u i2fDZuzSZDJF3WQdeGUPkEwVcWibjCIiYUe5E6bpLyxrRHsJH+LmCOaFohI/sKRUuG OhLvqwVoYX18sqaggmdo9jON1OieNJUXHF5QipJ8= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45IHVQn4048880 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 18 Jun 2024 12:31:26 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 18 Jun 2024 12:31:25 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 18 Jun 2024 12:31:25 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45IHVP37065567; Tue, 18 Jun 2024 12:31:25 -0500 From: Nishanth Menon To: Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Vaishnav Achath , Jared McArthur , Bryan Brattlof , Dhruva Gole Subject: [PATCH 3/3] arm64: dts: ti: k3-j722s: Add gpio-ranges properties Date: Tue, 18 Jun 2024 12:31:23 -0500 Message-ID: <20240618173123.2592074-4-nm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240618173123.2592074-1-nm@ti.com> References: <20240618173123.2592074-1-nm@ti.com> MIME-Version: 1.0 Organization: Texas Instruments, Inc. X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240618_103131_447529_CF37D831 X-CRM114-Status: GOOD ( 12.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jared McArthur The AM67A/J722S/TDA4AEN platform is a derivative of AM62P platform and we have no single 1:1 relation regarding index of GPIO and pin controller. The GPIOs and pin controller registers have mapping and holes in the map. These have been extracted from the J722S data sheet. The MCU mapping is carried forward as is with J722S, however the main GPIO block has differences that needs to be accounted for. Mux mode input is selected as it is bi-directional. In case a specific pull type or a specific pin level drive setting is desired, the board device tree files will have to explicitly mux those pins for the GPIO with the desired setting. Ref: J722S Data sheet https://www.ti.com/lit/gpn/tda4aen-q1 Signed-off-by: Jared McArthur Signed-off-by: Nishanth Menon --- Note: this generates a 'too large' warning for pinctrl-single,gpio-ranges - https://lore.kernel.org/r/20240618165102.2380159-1-nm@ti.com/ for more details arch/arm64/boot/dts/ti/k3-j722s.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index 9132b0232b0b..84441a8ed4f0 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -83,11 +83,28 @@ &inta_main_dmss { ti,interrupt-ranges = <7 71 21>; }; +&main_pmx0 { + pinctrl-single,gpio-range = + <&main_pmx0_range 0 32 (PIN_INPUT | PIN_GPIO_MUX_MODE)>, + <&main_pmx0_range 33 55 (PIN_INPUT | PIN_GPIO_MUX_MODE)>, + <&main_pmx0_range 101 25 (PIN_INPUT | PIN_GPIO_MUX_MODE)>, + <&main_pmx0_range 137 5 (PIN_INPUT | PIN_GPIO_MUX_MODE)>, + <&main_pmx0_range 143 3 (PIN_INPUT | PIN_GPIO_MUX_MODE)>, + <&main_pmx0_range 149 2 (PIN_INPUT | PIN_GPIO_MUX_MODE)>; +}; + &main_gpio0 { + gpio-ranges = <&main_pmx0 0 0 32>, + <&main_pmx0 32 33 38>, + <&main_pmx0 70 72 17>; ti,ngpio = <87>; }; &main_gpio1 { + gpio-ranges = <&main_pmx0 7 101 25>, + <&main_pmx0 42 137 5>, + <&main_pmx0 47 143 3>, + <&main_pmx0 50 149 2>; ti,ngpio = <73>; };