Message ID | 20240621091057.1473010-1-b-kapoor@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: ti: k3-j722s-evm: Add support for multiple CAN instances | expand |
Hi Bhavya, On 6/21/24 4:10 AM, Bhavya Kapoor wrote: > CAN instances 0 and 1 in the mcu domain and 0 in the main domain are > brought on the evm through headers J5, J8 and J10 respectively. Thus, > add their respective transceiver's 0, 1 and 2 dt nodes as well as > add the required pinmux to add support for these CAN instances. > Looks good to me. Reviewed-by: Judith Mendez <jm@ti.com> > Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> > --- > > rebased to: next-20240620 > > arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 74 +++++++++++++++++++++++++ > 1 file changed, 74 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > index 253b02f0437d..4fcfbade07c8 100644 > --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > @@ -124,10 +124,39 @@ vsys_io_1v2: regulator-vsys-io-1v2 { > regulator-always-on; > regulator-boot-on; > }; > + > + transceiver0: can-phy0 { > + compatible = "ti,tcan1042"; > + #phy-cells = <0>; > + max-bitrate = <5000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; > + standby-gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>; > + }; > + > + transceiver1: can-phy1 { > + compatible = "ti,tcan1042"; > + #phy-cells = <0>; > + max-bitrate = <5000000>; > + }; > + > + transceiver2: can-phy2 { > + compatible = "ti,tcan1042"; > + #phy-cells = <0>; > + max-bitrate = <5000000>; > + standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>; > + }; > }; > > &main_pmx0 { > > + main_mcan0_pins_default: main-mcan0-default-pins { > + pinctrl-single,pins = < > + J722S_IOPAD(0x1dc, PIN_INPUT, 0) /* (C22) MCAN0_RX */ > + J722S_IOPAD(0x1d8, PIN_OUTPUT, 0) /*(D22) MCAN0_TX */ > + >; > + }; > + > main_i2c0_pins_default: main-i2c0-default-pins { > pinctrl-single,pins = < > J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */ > @@ -250,6 +279,26 @@ &main_uart0 { > > &mcu_pmx0 { > > + mcu_mcan0_pins_default: mcu-mcan0-default-pins { > + pinctrl-single,pins = < > + J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */ > + J722S_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (B2) MCU_MCAN0_TX */ > + >; > + }; > + > + mcu_mcan1_pins_default: mcu-mcan1-default-pins { > + pinctrl-single,pins = < > + J722S_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (B1) MCU_MCAN1_RX */ > + J722S_MCU_IOPAD(0x03C, PIN_OUTPUT, 0) /*(C1) MCU_MCAN1_TX */ > + >; > + }; > + > + mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { > + pinctrl-single,pins = < > + J722S_MCU_IOPAD(0x0030, PIN_OUTPUT, 7) /* (C3) MCU_GPIO0_12 */ > + >; > + }; > + > wkup_uart0_pins_default: wkup-uart0-default-pins { > pinctrl-single,pins = < > J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ > @@ -457,3 +506,28 @@ &usb1 { > phys = <&serdes0_usb_link>; > phy-names = "cdns3,usb3-phy"; > }; > + > +&mcu_mcan0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&mcu_mcan0_pins_default>; > + phys = <&transceiver0>; > +}; > + > +&mcu_mcan1 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&mcu_mcan1_pins_default>; > + phys = <&transceiver1>; > +}; > + > +&main_mcan0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&main_mcan0_pins_default>; > + phys = <&transceiver2>; > +}; > + > +&mcu_gpio0 { > + status = "okay"; > +};
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index 253b02f0437d..4fcfbade07c8 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -124,10 +124,39 @@ vsys_io_1v2: regulator-vsys-io-1v2 { regulator-always-on; regulator-boot-on; }; + + transceiver0: can-phy0 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; + standby-gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>; + }; + + transceiver1: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + transceiver2: can-phy2 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>; + }; }; &main_pmx0 { + main_mcan0_pins_default: main-mcan0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1dc, PIN_INPUT, 0) /* (C22) MCAN0_RX */ + J722S_IOPAD(0x1d8, PIN_OUTPUT, 0) /*(D22) MCAN0_TX */ + >; + }; + main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */ @@ -250,6 +279,26 @@ &main_uart0 { &mcu_pmx0 { + mcu_mcan0_pins_default: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */ + J722S_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (B2) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan1_pins_default: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (B1) MCU_MCAN1_RX */ + J722S_MCU_IOPAD(0x03C, PIN_OUTPUT, 0) /*(C1) MCU_MCAN1_TX */ + >; + }; + + mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x0030, PIN_OUTPUT, 7) /* (C3) MCU_GPIO0_12 */ + >; + }; + wkup_uart0_pins_default: wkup-uart0-default-pins { pinctrl-single,pins = < J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ @@ -457,3 +506,28 @@ &usb1 { phys = <&serdes0_usb_link>; phy-names = "cdns3,usb3-phy"; }; + +&mcu_mcan0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_pins_default>; + phys = <&transceiver0>; +}; + +&mcu_mcan1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + phys = <&transceiver1>; +}; + +&main_mcan0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan0_pins_default>; + phys = <&transceiver2>; +}; + +&mcu_gpio0 { + status = "okay"; +};
CAN instances 0 and 1 in the mcu domain and 0 in the main domain are brought on the evm through headers J5, J8 and J10 respectively. Thus, add their respective transceiver's 0, 1 and 2 dt nodes as well as add the required pinmux to add support for these CAN instances. Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> --- rebased to: next-20240620 arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 74 +++++++++++++++++++++++++ 1 file changed, 74 insertions(+)