From patchwork Sun Jun 23 07:24:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 13708519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E56CC27C4F for ; Sun, 23 Jun 2024 07:25:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=gAlRkNKfZ8QBw14FJ3xMhXtk9zb2drmU1aEVw1KgyzI=; b=upNAlZwmau/sqIgU4AJJ6UDXaE sxAxd7MaciG3OSX99JXxwb9c7oW+ETxmX5+sQMpxLj4w4HdHYnNDlT5q7LP2Ps6KtgEBrvM++LK3G o6Hf7eWfAerSNkk3xHJM3PC2NXJafgcyWKBs2iBUqLU1dgKcP8qjV5CtGI3VZghbn3d8WeKj/4rTI LFCb29igCTR9vO9w11aeGeGPxOWnXg2hAMWokE3YBRFfWiUJbUhKKer93vySy1AhjmP4eOvOCy/yB UwIbWWxq0Kt4FuJL6kacbDnlpDXoLmyFZmgG++pJqQe48QjJkQfl/e17WLt/0pOJcURm0GBrIs1Xk pGwFpsMA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sLHb3-0000000DXXK-2vgY; Sun, 23 Jun 2024 07:25:09 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sLHaz-0000000DXWz-261b for linux-arm-kernel@lists.infradead.org; Sun, 23 Jun 2024 07:25:06 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 5F179CE09B5; Sun, 23 Jun 2024 07:25:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 11099C2BD10; Sun, 23 Jun 2024 07:24:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719127501; bh=BwtYHR9K/qaXat08dSgtAq8LjtWakgkgkqSmffFvvWI=; h=From:Date:Subject:To:Cc:From; b=DNEZS2CQX6ee1fgShn2Lb7Ay3nYjdTo+DMp91eRyYzTmKB9SAAST2KqQ6A/nUTe+X Hlqu+8AfSXcngNhaAwKfEev7IO88XgHnMWbOX+z5tylDurd97br7e7bBKpjtezIOmB n4rp0hB7zD8ZoYX3CmHSyKQRKxkRYemM5qonmuRSy2w+jOETQvt7O0WWq6ryeDVW3r CJaNW7UT51YJKJ4zc1fPCuOaNES2CdzvhbJz7c5RwXoCpcUyaxwneyrleN7H/4inZB u/BpLeo3eE9P+wPN0Wq2ztPbqEhqPe2gtBEOtr5pEZnrVCtiwQ0EPKB/1jxoF5P08r VvY3X0dr3G2BA== From: Roger Quadros Date: Sun, 23 Jun 2024 10:24:56 +0300 Subject: [PATCH] arm: dts: k3-am642-evm-nand: Add bootph-all to NAND related nodes MIME-Version: 1.0 Message-Id: <20240623-am642-evm-nand-bootph-v1-1-dc3af37a3322@kernel.org> X-B4-Tracking: v=1; b=H4sIAMfNd2YC/x3MQQqAIBBA0avErBswE6muEi00p5yFGhoRRHdPW r7F/w8UykwFpuaBTBcXTrGiaxtYvYk7IbtqkEIqoWWPJmglka6A0USHNqXz8Ch6qwer1tGNBLU 9Mm18/995ed8PKpvpKGcAAAA= To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: srk@ti.com, praneeth@ti.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1554; i=rogerq@kernel.org; h=from:subject:message-id; bh=BwtYHR9K/qaXat08dSgtAq8LjtWakgkgkqSmffFvvWI=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBmd83K31AQjJo2X8Im5rI3r3U93XfIAB0ZZSOm0 OaT9bNTcr6JAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZnfNygAKCRDSWmvTvnYw k5BGD/9d0YuiqFIu/lGwDFuvUAirPmcmBc8h+uz9Qb1REEL2Ajs3xXyXJTBoNg+wUH4Ih4+ScX4 vE69JCto3mv0Ty3qzR8VtKdbRTxZ0oPGG+ZVLNVfVDIaSMsGVdI6PaeGdltnOLNxF2Kb5R4oe5V 7nsrkX0xQv/ITG4DAmHNPwwSA5s55ABDSqCOHPBAI5pxbu284DRBYPl2S6vK0xHRA2ylaVnQ3bF A+dC1pfSgIqVMoQ8dB+RtiOCNjaUmGA1TZWW+dD8hkQ0JkdLsvwEpitkWUb0U0THd3/3Tg+Mj4t 0dJagyinQKwUkdUKb8+LVVCG2F7FEv7UHGvWu07+kLonsoDs2vN3bJBN2B4DQs/JMHhBGIkBNKs PwcmVr6trAYlgzbj3bR9w+fUci0xpV20yb6UPuGKtm7RFgywMnhCBWa7qlG0lrcWYqeIq9FTcoO BEgSjpP1J9whR2rJ+mIYqbfGbZQpLgKIyhJ1TF/Fyl+SE9ntLrKp7RjLZg/LTsvlILzpxNP4P4l mnSLa3ZZwIy/cbYkCO1KOq0AgW89tYqlFR41Ts0hl7pEmBV9DvVCAGCcazRXWhNNIUDFnNubjit ubJWAUswL+/J8p6ImGHbZ0XqVb8P7aJ2nThxA1AxAx49AJlJTqGEhO25A0i7AcszSCaNWnr1sq0 8ptwYkwrwFjO5fA== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240623_002505_928553_F44CFD60 X-CRM114-Status: UNSURE ( 8.61 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org NAND boot would require these nodes to be present at early stage. Ensure that by adding "bootph-all" to relevant nodes. Signed-off-by: Roger Quadros --- arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso | 6 ++++++ 1 file changed, 6 insertions(+) --- base-commit: 4031a2866a9f0f5c585cfee65b3fb5ab17c95276 change-id: 20240623-am642-evm-nand-bootph-03b68b4c9d9e Best regards, diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso index dc70b6fbc3d7..babd681666f4 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso @@ -13,6 +13,7 @@ &main_pmx0 { gpmc0_pins_default: gpmc0-pins-default { + bootph-all; pinctrl-single,pins = < AM64X_IOPAD(0x0094, PIN_INPUT, 7) /* (T19) GPMC0_BE1n.GPIO0_36 */ AM64X_IOPAD(0x003c, PIN_INPUT, 0) /* (T20) GPMC0_AD0 */ @@ -49,7 +50,9 @@ AM64X_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (N17) GPMC0_DIR */ }; &main_gpio0 { + bootph-all; gpio0-36 { + bootph-all; gpio-hog; gpios = <36 0>; input; @@ -58,10 +61,12 @@ gpio0-36 { }; &elm0 { + bootph-all; status = "okay"; }; &gpmc0 { + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&gpmc0_pins_default>; @@ -69,6 +74,7 @@ &gpmc0 { #size-cells = <1>; nand@0,0 { + bootph-all; compatible = "ti,am64-nand"; reg = <0 0 64>; /* device IO registers */ interrupt-parent = <&gpmc0>;