From patchwork Wed Jun 26 22:32:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 13713498 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6EC84C27C4F for ; Wed, 26 Jun 2024 22:34:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=roq/0ZIgB+W4C88N1JhdiU5R2jYIRs0etoy0/UuO4z8=; b=0sZqrdscYht640/Rdbma+U1Jge bfoMlcJlO4JVuCkJhvdZQXQQmY7/YoRLHWUvZOsuruZhvI66CNA6QL2ehKACcpDFUyjMFxejbXlvh eroNL48M0s0xQdKt2r9q/X9/IVtGFV6yqc9KFNeJa50fenFhf8JleW/aJ9Dp0BNsepeBaCTgfPEAF jsVAM1acjVc3yNB2NLebXDY/VFW6XmbIybG1e2A3YMZTHCeoqIQPyZ982NgEfDc6AH0dGv5SsNkch AJyJvZqDEyO/BB5nM20hbpd204bJU+MpN5sBs71LlZcPqYFdTVCz3S5LLDuPQGT+M29Enaj8PIChT Ovei5DqQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sMbD6-00000008Vzl-25zr; Wed, 26 Jun 2024 22:33:52 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sMbC8-00000008VVR-31yc for linux-arm-kernel@lists.infradead.org; Wed, 26 Jun 2024 22:32:54 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id EDF5DCE2CAA; Wed, 26 Jun 2024 22:32:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EE4C0C4AF09; Wed, 26 Jun 2024 22:32:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719441170; bh=wYtP0aH9fJbZZHyZZvzwA995oKRV3TgakLXKmZjWeaA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=bSLec07JisOBOgpLsTSMSAQ5CWExbONYAscijobtG38T+Q+zTHoa5SLpACXB70Ddw QiE4ONStcjCSMBYrPDcFZYJ+PYbnOPzkqihHoChtAGHuln//7YaTtXwm8wd7T5h/yX AiSaE1X2ZQV4oCHfz9JvR99G6UvMu125+HK9nk7EhOvGFsvFA4PN8WPq50XkFcUox+ 9ey7+qdTl/wK19K9kxNaA5f/jJPo04zjHZlDBTKwulLBMZv58UK0neuZnMCfUHFfp8 vzVx+qRGyOAutwFQIDPuGySS+ZZmKMjK2tDYbQhZGTjI4/vyOpJ6GSj7qINfcNXhsM 2c80R4/JyqCoQ== From: "Rob Herring (Arm)" Date: Wed, 26 Jun 2024 16:32:32 -0600 Subject: [PATCH v2 08/12] KVM: arm64: pmu: Use arm_pmuv3.h register accessors MIME-Version: 1.0 Message-Id: <20240626-arm-pmu-3-9-icntr-v2-8-c9784b4f4065@kernel.org> References: <20240626-arm-pmu-3-9-icntr-v2-0-c9784b4f4065@kernel.org> In-Reply-To: <20240626-arm-pmu-3-9-icntr-v2-0-c9784b4f4065@kernel.org> To: Russell King , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Will Deacon , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , James Clark Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, kvmarm@lists.linux.dev X-Mailer: b4 0.14-dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240626_153253_247547_090AB265 X-CRM114-Status: GOOD ( 14.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Commit df29ddf4f04b ("arm64: perf: Abstract system register accesses away") split off PMU register accessor functions to a standalone header. Let's use it for KVM PMU code and get rid one copy of the ugly switch macro. Acked-by: Mark Rutland Signed-off-by: Rob Herring (Arm) Reviewed-by: Marc Zyngier --- v2: - Use linux/perf/arm_pmuv3.h include instead of asm/ --- arch/arm64/include/asm/arm_pmuv3.h | 13 ++++++++ arch/arm64/kvm/pmu.c | 66 +++++--------------------------------- 2 files changed, 21 insertions(+), 58 deletions(-) diff --git a/arch/arm64/include/asm/arm_pmuv3.h b/arch/arm64/include/asm/arm_pmuv3.h index 19b3f9150058..36c3e82b4eec 100644 --- a/arch/arm64/include/asm/arm_pmuv3.h +++ b/arch/arm64/include/asm/arm_pmuv3.h @@ -33,6 +33,14 @@ static inline void write_pmevtypern(int n, unsigned long val) PMEVN_SWITCH(n, WRITE_PMEVTYPERN); } +#define RETURN_READ_PMEVTYPERN(n) \ + return read_sysreg(pmevtyper##n##_el0) +static inline unsigned long read_pmevtypern(int n) +{ + PMEVN_SWITCH(n, RETURN_READ_PMEVTYPERN); + return 0; +} + static inline unsigned long read_pmmir(void) { return read_cpuid(PMMIR_EL1); @@ -96,6 +104,11 @@ static inline void write_pmccfiltr(u64 val) write_sysreg(val, pmccfiltr_el0); } +static inline u64 read_pmccfiltr(void) +{ + return read_sysreg(pmccfiltr_el0); +} + static inline void write_pmovsclr(u64 val) { write_sysreg(val, pmovsclr_el0); diff --git a/arch/arm64/kvm/pmu.c b/arch/arm64/kvm/pmu.c index e633b4434c6a..a47ae311d4a8 100644 --- a/arch/arm64/kvm/pmu.c +++ b/arch/arm64/kvm/pmu.c @@ -5,6 +5,7 @@ */ #include #include +#include static DEFINE_PER_CPU(struct kvm_pmu_events, kvm_pmu_events); @@ -62,63 +63,16 @@ void kvm_clr_pmu_events(u64 clr) pmu->events_guest &= ~clr; } -#define PMEVTYPER_READ_CASE(idx) \ - case idx: \ - return read_sysreg(pmevtyper##idx##_el0) - -#define PMEVTYPER_WRITE_CASE(idx) \ - case idx: \ - write_sysreg(val, pmevtyper##idx##_el0); \ - break - -#define PMEVTYPER_CASES(readwrite) \ - PMEVTYPER_##readwrite##_CASE(0); \ - PMEVTYPER_##readwrite##_CASE(1); \ - PMEVTYPER_##readwrite##_CASE(2); \ - PMEVTYPER_##readwrite##_CASE(3); \ - PMEVTYPER_##readwrite##_CASE(4); \ - PMEVTYPER_##readwrite##_CASE(5); \ - PMEVTYPER_##readwrite##_CASE(6); \ - PMEVTYPER_##readwrite##_CASE(7); \ - PMEVTYPER_##readwrite##_CASE(8); \ - PMEVTYPER_##readwrite##_CASE(9); \ - PMEVTYPER_##readwrite##_CASE(10); \ - PMEVTYPER_##readwrite##_CASE(11); \ - PMEVTYPER_##readwrite##_CASE(12); \ - PMEVTYPER_##readwrite##_CASE(13); \ - PMEVTYPER_##readwrite##_CASE(14); \ - PMEVTYPER_##readwrite##_CASE(15); \ - PMEVTYPER_##readwrite##_CASE(16); \ - PMEVTYPER_##readwrite##_CASE(17); \ - PMEVTYPER_##readwrite##_CASE(18); \ - PMEVTYPER_##readwrite##_CASE(19); \ - PMEVTYPER_##readwrite##_CASE(20); \ - PMEVTYPER_##readwrite##_CASE(21); \ - PMEVTYPER_##readwrite##_CASE(22); \ - PMEVTYPER_##readwrite##_CASE(23); \ - PMEVTYPER_##readwrite##_CASE(24); \ - PMEVTYPER_##readwrite##_CASE(25); \ - PMEVTYPER_##readwrite##_CASE(26); \ - PMEVTYPER_##readwrite##_CASE(27); \ - PMEVTYPER_##readwrite##_CASE(28); \ - PMEVTYPER_##readwrite##_CASE(29); \ - PMEVTYPER_##readwrite##_CASE(30) - /* * Read a value direct from PMEVTYPER where idx is 0-30 * or PMCCFILTR_EL0 where idx is ARMV8_PMU_CYCLE_IDX (31). */ static u64 kvm_vcpu_pmu_read_evtype_direct(int idx) { - switch (idx) { - PMEVTYPER_CASES(READ); - case ARMV8_PMU_CYCLE_IDX: - return read_sysreg(pmccfiltr_el0); - default: - WARN_ON(1); - } + if (idx == ARMV8_PMU_CYCLE_IDX) + return read_pmccfiltr(); - return 0; + return read_pmevtypern(idx); } /* @@ -127,14 +81,10 @@ static u64 kvm_vcpu_pmu_read_evtype_direct(int idx) */ static void kvm_vcpu_pmu_write_evtype_direct(int idx, u32 val) { - switch (idx) { - PMEVTYPER_CASES(WRITE); - case ARMV8_PMU_CYCLE_IDX: - write_sysreg(val, pmccfiltr_el0); - break; - default: - WARN_ON(1); - } + if (idx == ARMV8_PMU_CYCLE_IDX) + write_pmccfiltr(val); + else + write_pmevtypern(idx, val); } /*