From patchwork Thu Jun 27 16:25:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13714781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9BEC3C2BD09 for ; Thu, 27 Jun 2024 16:26:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CCJwwKb+hvEmjWMelrMlJG7ya9EjLTcM5ERxIkDLI/k=; b=4Vw1r3ixyAehQ8kSBoo4Q6+YAB Bv+o4DbHG4S3b/Jl9+iNzrZyujW9ioKobHrXLFYMgtG9nLWXiLjqHGk2qiQhM5kO4gK0rKaSG5Ppz Dy3ymLw8Fxrh5GylCnmkpKcoeo60M8WdDUiiqYlgf/2Dz1gwUbsLpBAnXNzLmgXd4heFLbHIQtcVf nhfzFQTMWyQJzS4GtUV50M0Y/coRU3/8Zt1Dy/SudNRXrDFRlued6Q/YHJ4gaEpMNB34ouYk5eR5a eoLBni9LeYBmF6eyAs5u/h0uaaCNVbo0oDl4ge0VBJlBoo/SbOF/hCtnnCAE7l+EtO9e4SHNie9/Q HnMsnmxw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sMrwe-0000000B1oV-2PgF; Thu, 27 Jun 2024 16:26:00 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sMrwV-0000000B1lZ-2Arr for linux-arm-kernel@lists.infradead.org; Thu, 27 Jun 2024 16:25:53 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45RGPfT6049649; Thu, 27 Jun 2024 11:25:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1719505541; bh=CCJwwKb+hvEmjWMelrMlJG7ya9EjLTcM5ERxIkDLI/k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=i098GdFa11rnXKArF4pIk2k7NNrkWPOavIMxq48LWkjQjsv2WkiETfmPvjrCVDT6K CVOdjvIJFTMlVPOMbLiVS+v0bbHVDgPm2sRiElzMVqaekJxVIcIm+ucyP2I5wPMI+Z SG8CVpQApewUltlnM5wuOnHR66UevVMKvbB28z5I= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45RGPfdt023122 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 27 Jun 2024 11:25:41 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 27 Jun 2024 11:25:41 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 27 Jun 2024 11:25:41 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45RGPfB9095207; Thu, 27 Jun 2024 11:25:41 -0500 From: Nishanth Menon To: Conor Dooley , Krzysztof Kozlowski , Rob Herring , Vignesh Raghavendra CC: , , , Tero Kristo , Vaishnav Achath , Jared McArthur , Bryan Brattlof , Dhruva Gole , Nishanth Menon Subject: [PATCH V2 3/3] arm64: dts: ti: k3-j722s: Add gpio-ranges properties Date: Thu, 27 Jun 2024 11:25:39 -0500 Message-ID: <20240627162539.691223-4-nm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240627162539.691223-1-nm@ti.com> References: <20240627162539.691223-1-nm@ti.com> MIME-Version: 1.0 Organization: Texas Instruments, Inc. X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240627_092551_699370_5068CAEB X-CRM114-Status: GOOD ( 12.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jared McArthur The AM67A/J722S/TDA4AEN platform is a derivative of AM62P platform and we have no single 1:1 relation regarding index of GPIO and pin controller. The GPIOs and pin controller registers have mapping and holes in the map. These have been extracted from the J722S data sheet. The MCU mapping is carried forward as is with J722S, however the main GPIO block has differences that needs to be accounted for. Mux mode input is selected as it is bi-directional. In case a specific pull type or a specific pin level drive setting is desired, the board device tree files will have to explicitly mux those pins for the GPIO with the desired setting. Ref: J722S Data sheet https://www.ti.com/lit/gpn/tda4aen-q1 Signed-off-by: Jared McArthur Signed-off-by: Nishanth Menon --- Changes since V1: - Use PIN_GPIO_RANGE_IOPAD instead of PIN_GPIO_MUX_MODE - Refactored on top of next-20240626 (refactored files) V1: https://lore.kernel.org/linux-arm-kernel/20240618173123.2592074-4-nm@ti.com/ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index 228c6c89245c..28aac43aae45 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -181,10 +181,28 @@ &inta_main_dmss { ti,interrupt-ranges = <7 71 21>; }; +&main_pmx0 { + pinctrl-single,gpio-range = + <&main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 33 55 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 101 25 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 137 5 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 143 3 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 149 2 PIN_GPIO_RANGE_IOPAD>; + + main_pmx0_range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; +}; + &main_gpio0 { + gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>, + <&main_pmx0 70 72 17>; ti,ngpio = <87>; }; &main_gpio1 { + gpio-ranges = <&main_pmx0 7 101 25>, <&main_pmx0 42 137 5>, + <&main_pmx0 47 143 3>, <&main_pmx0 50 149 2>; ti,ngpio = <73>; };