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AJvYcCUO+uQiwS1WK+e2SJZOMA+c2n6m7vRI4UneC/FQTjbbajBqXP0ZPVnl2fXJofN2/XGsPUXuPX1mE2x0TjWJ/Srtn1V922CEOCeJhl5IeMt1xniheTU= X-Gm-Message-State: AOJu0Yw9q5svJhmYGP3plisnSuxO0MvoyarqIAUiy0l0lw04OCQjc+Wz cRt1hkfPeRIb2JkHHR43VtP7mWYv4lCSHSK1wbx/BfG4b0O7eXWM X-Google-Smtp-Source: AGHT+IHfW+NESmWd/AJ8l91EGa76rIOSfdHDEzj4bjSG/ElE2JXyq6xBCGFd0i3y8ZXFM44Kf+je5A== X-Received: by 2002:a05:6512:108c:b0:52c:dd25:9ac6 with SMTP id 2adb3069b0e04-52ce1835607mr14311724e87.29.1719509586182; Thu, 27 Jun 2024 10:33:06 -0700 (PDT) Received: from localhost ([213.79.110.82]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52e7ab0ba53sm1430e87.50.2024.06.27.10.33.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jun 2024 10:33:05 -0700 (PDT) From: Serge Semin To: Michal Simek , Alexander Stein , Borislav Petkov , Tony Luck , James Morse , Mauro Carvalho Chehab , Robert Richter , Shubhrajyoti Datta Cc: Serge Semin , Punnaiah Choudary Kalluri , Dinh Nguyen , Shubhrajyoti Datta , Arnd Bergmann , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Shubhrajyoti Datta , Borislav Petkov Subject: [PATCH RESEND v6 04/18] EDAC/synopsys: Fix reading errors count before ECC status Date: Thu, 27 Jun 2024 20:32:11 +0300 Message-ID: <20240627173251.25718-5-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240627173251.25718-1-fancer.lancer@gmail.com> References: <20240627173251.25718-1-fancer.lancer@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240627_103308_312160_A4CCE4C0 X-CRM114-Status: GOOD ( 15.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Aside with fixing the errors count CSR usage the commit e2932d1f6f05 ("EDAC/synopsys: Read the error count from the correct register") all of the sudden has also changed the order of the errors status check procedure. So now the errors handler method first reads the number of CE and UE and only then makes sure that any of these errors have actually happened. It doesn't make sense. Fix that by getting back the correct procedures order: first check the ECC status, then read the number of errors. Fixes: e2932d1f6f05 ("EDAC/synopsys: Read the error count from the correct register") Signed-off-by: Serge Semin Reviewed-by: Shubhrajyoti Datta --- drivers/edac/synopsys_edac.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 88db777f3d90..6d578f4b03b1 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -418,18 +418,18 @@ static int zynqmp_get_error_info(struct synps_edac_priv *priv) base = priv->baseaddr; p = &priv->stat; - regval = readl(base + ECC_ERRCNT_OFST); - p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK; - p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >> ECC_ERRCNT_UECNT_SHIFT; - if (!p->ce_cnt) - goto ue_err; - regval = readl(base + ECC_STAT_OFST); if (!regval) return 1; p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK); + regval = readl(base + ECC_ERRCNT_OFST); + p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK; + p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >> ECC_ERRCNT_UECNT_SHIFT; + if (!p->ce_cnt) + goto ue_err; + regval = readl(base + ECC_CEADDR0_OFST); p->ceinfo.row = (regval & ECC_CEADDR0_RW_MASK); regval = readl(base + ECC_CEADDR1_OFST);