From patchwork Tue Jul 2 11:42:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719480 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1E6DC30658 for ; Tue, 2 Jul 2024 11:43:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Dcdw1+J7AOP9U9d8UIfC8eULK+kHqPmPD0r3xpdJnTo=; b=RY8RgcbGaU0FfHuSn8veQcsTfR kt4HjPNCqV6KhGwIjKCjOJLH5PlXL63e4T5icZUh7t+xKzIilrFu7TTpUwp1L2/6Otohqa4cxU41O oYesxi9qjQGcOv52OwuayD3k9FQa5FNAQnut1UXthAO3csnYZFN0a2Up/EmTyVXdlnyTvfDNx+vBv qm2rnPhbE+6U+w0q7i9XUpyymoWjZCHAplNq6+o8kJrsrJzXoensmjpybL4HlFC7euFm2Pa6ljzAl 4fGyM7yNMUaQfG06pkxLrAQP7r37PwTRzzKxYBau/XSH7U8dPHqX96Aj+FtPApscX7fE6jSAoYcyk fGEa4vJw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvC-00000006WDo-1442; Tue, 02 Jul 2024 11:43:42 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObum-00000006W0F-13ls for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:17 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 3C3C7CE16FE; Tue, 2 Jul 2024 11:43:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61D03C2BD10; Tue, 2 Jul 2024 11:43:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920593; bh=cMSx15oK1SYBvYhL4v+UnmeieqOoovhAAQLeVG07Hok=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MSXZY+fMu2EHo74I3273pWV4WW2WPLv/dLUkOTjUbLsN3k1sr0gH+K0ZfqjADSg6o GUmAzbX4vC44oKzHHJFOAj+fqrO22SM1xLMy5ZwbdClBXMYs2ONYjYKQe0c5yBfG/8 1jr+6biG1+hpmoQfauDPvmlhGWb7s197UHN3ssVgS9ZQ3aLwffK/AQccSbTS/ORKWH 2HC1W8UqEgh9IxjXYixCwaPT3sSQFnxz6g8qN9hn5E7aabWLEvI2IbRk5ozcYDC1rG bW572ktoWFaIgdBTwYxeBOU3fLxIHstCS4OWNEMjv6yiaUsFWmu6kMVrXsPCcSFi6i Mmp9v5tibLPeg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 02/30] irqchip/armada-370-xp: Change register constant suffix from _MSK to _MASK Date: Tue, 2 Jul 2024 13:42:34 +0200 Message-ID: <20240702114302.22475-3-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044316_705072_72B01642 X-CRM114-Status: GOOD ( 13.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There is one occurrence of suffix _MSK in register constants, others have _MASK instead. Change the one to _MASK for consistency. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 66d6a2ebc8a5..588a9e2e1887 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -126,7 +126,7 @@ /* Registers relative to per_cpu_int_base */ #define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) -#define ARMADA_370_XP_IN_DRBEL_MSK (0x0c) +#define ARMADA_370_XP_IN_DRBEL_MASK (0x0c) #define ARMADA_375_PPI_CAUSE (0x10) #define ARMADA_370_XP_CPU_INTACK (0x44) #define ARMADA_370_XP_INT_SET_MASK (0x48) @@ -324,9 +324,9 @@ static void armada_370_xp_msi_reenable_percpu(void) u32 reg; /* Enable MSI doorbell mask and combined cpu local interrupt */ - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); reg |= msi_doorbell_mask(); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); /* Unmask local doorbell interrupt */ writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); @@ -394,17 +394,17 @@ static struct irq_domain *ipi_domain; static void armada_370_xp_ipi_mask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); reg &= ~BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); } static void armada_370_xp_ipi_unmask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); reg |= BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); } static void armada_370_xp_ipi_send_mask(struct irq_data *d, @@ -539,7 +539,7 @@ static void armada_xp_mpic_smp_cpu_init(void) return; /* Disable all IPIs */ - writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); /* Clear pending IPIs */ writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); @@ -740,7 +740,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) static int armada_370_xp_mpic_suspend(void) { - doorbell_mask_reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + doorbell_mask_reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); return 0; } @@ -785,7 +785,7 @@ static void armada_370_xp_mpic_resume(void) /* Reconfigure doorbells for IPIs and MSIs */ writel(doorbell_mask_reg, - per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); if (is_ipi_available()) { src0 = doorbell_mask_reg & IPI_DOORBELL_MASK;