diff mbox series

[kvm-unit-tests,v1,2/2] arm/mmu: widen the page size check to account for LPA2

Message ID 20240702163515.1964784-3-alex.bennee@linaro.org (mailing list archive)
State New
Headers show
Series Some fixes for running under -cpu max on QEMU | expand

Commit Message

Alex Bennée July 2, 2024, 4:35 p.m. UTC
If FEAT_LPA2 is enabled there are different valid TGran values
possible to indicate the granule is supported for 52 bit addressing.
This will cause most tests to abort on QEMU's -cpu max with the error:

  lib/arm/mmu.c:216: assert failed: system_supports_granule(PAGE_SIZE): Unsupported translation granule 4096

Expand the test to tale this into account.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Anders Roxell <anders.roxell@linaro.org>
---
 lib/arm64/asm/processor.h | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)

Comments

Zenghui Yu July 3, 2024, 3:52 a.m. UTC | #1
Hi Alex,

[ Please don't send patches to the old kvmarm@lists.cs.columbia.edu as
it had been dropped since early 2023. [1] ]

On 2024/7/3 0:35, Alex Bennée wrote:
> If FEAT_LPA2 is enabled there are different valid TGran values
> possible to indicate the granule is supported for 52 bit addressing.
> This will cause most tests to abort on QEMU's -cpu max with the error:
> 
>   lib/arm/mmu.c:216: assert failed: system_supports_granule(PAGE_SIZE): Unsupported translation granule 4096
> 
> Expand the test to tale this into account.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Cc: Anders Roxell <anders.roxell@linaro.org>

There's a similar patch on the list [2], haven't been merged in master
though.

[1] https://git.kernel.org/torvalds/c/960c3028a1d5
[2] 
https://lore.kernel.org/all/20240402132739.201939-6-andrew.jones@linux.dev
Andrew Jones July 3, 2024, 1:34 p.m. UTC | #2
On Wed, Jul 03, 2024 at 11:52:05AM GMT, Zenghui Yu wrote:
> Hi Alex,
> 
> [ Please don't send patches to the old kvmarm@lists.cs.columbia.edu as
> it had been dropped since early 2023. [1] ]
> 
> On 2024/7/3 0:35, Alex Bennée wrote:
> > If FEAT_LPA2 is enabled there are different valid TGran values
> > possible to indicate the granule is supported for 52 bit addressing.
> > This will cause most tests to abort on QEMU's -cpu max with the error:
> > 
> >   lib/arm/mmu.c:216: assert failed: system_supports_granule(PAGE_SIZE): Unsupported translation granule 4096
> > 
> > Expand the test to tale this into account.
> > 
> > Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> > Cc: Anders Roxell <anders.roxell@linaro.org>
> 
> There's a similar patch on the list [2], haven't been merged in master
> though.

Drat, I queued that, and several other patches, and then, for whatever
reason, I delayed the merge (I was probably just waiting for the gitlab
pipeline to finish...) and then forgot to actually merge... I've merged
now.

Please don't hesitate to ping me on patches that linger too long. I
sometimes need that interrupt to trigger my context switch!

Thanks,
drew

> 
> [1] https://git.kernel.org/torvalds/c/960c3028a1d5
> [2]
> https://lore.kernel.org/all/20240402132739.201939-6-andrew.jones@linux.dev
diff mbox series

Patch

diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
index 1c73ba32..4a213aec 100644
--- a/lib/arm64/asm/processor.h
+++ b/lib/arm64/asm/processor.h
@@ -110,31 +110,30 @@  static inline unsigned long get_id_aa64mmfr0_el1(void)
 #define ID_AA64MMFR0_TGRAN64_SHIFT	24
 #define ID_AA64MMFR0_TGRAN16_SHIFT	20
 
-#define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0
-#define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0
-#define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1
+#define ID_AA64MMFR0_TGRAN4_OK	        0x0
+#define ID_AA64MMFR0_TGRAN4_52_OK       0x1
+#define ID_AA64MMFR0_TGRAN64_OK	0x0
+#define ID_AA64MMFR0_TGRAN16_OK	        0x1
+#define ID_AA64MMFR0_TGRAN16_52_OK      0x2
 
 static inline bool system_supports_granule(size_t granule)
 {
-	u32 shift;
 	u32 val;
-	u64 mmfr0;
+	u64 mmfr0 = get_id_aa64mmfr0_el1();
 
 	if (granule == SZ_4K) {
-		shift = ID_AA64MMFR0_TGRAN4_SHIFT;
-		val = ID_AA64MMFR0_TGRAN4_SUPPORTED;
+		val = ((mmfr0 >> ID_AA64MMFR0_TGRAN4_SHIFT) & 0xf);
+		return (val == ID_AA64MMFR0_TGRAN4_OK) ||
+		       (val == ID_AA64MMFR0_TGRAN4_52_OK);
 	} else if (granule == SZ_16K) {
-		shift = ID_AA64MMFR0_TGRAN16_SHIFT;
-		val = ID_AA64MMFR0_TGRAN16_SUPPORTED;
+		val = ((mmfr0 >> ID_AA64MMFR0_TGRAN16_SHIFT) & 0xf);
+		return val == ID_AA64MMFR0_TGRAN16_OK;
 	} else {
 		assert(granule == SZ_64K);
-		shift = ID_AA64MMFR0_TGRAN64_SHIFT;
-		val = ID_AA64MMFR0_TGRAN64_SUPPORTED;
+		val = ((mmfr0 >> ID_AA64MMFR0_TGRAN64_SHIFT) & 0xf);
+		return (val == ID_AA64MMFR0_TGRAN64_OK) ||
+		       (val == ID_AA64MMFR0_TGRAN4_52_OK);
 	}
-
-	mmfr0 = get_id_aa64mmfr0_el1();
-
-	return ((mmfr0 >> shift) & 0xf) == val;
 }
 
 #endif /* !__ASSEMBLY__ */