| Message ID | 20240703154743.824824-1-maz@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | KVM: arm64: nv: Truely enable nXS TLBI operations | expand |
On Wed, 3 Jul 2024 16:47:43 +0100, Marc Zyngier wrote: > Although we now have support for nXS-flavoured TLBI instructions, > we still don't expose the feature to the guest thanks to a mixture > of misleading comment and use of a bunch of magic values. > > Fix the comment and correctly express the masking of LS64, which > is enough to expose nXS to the world. Not that anyone cares... > > [...] Applied to kvmarm/next, thanks! [1/1] KVM: arm64: nv: Truely enable nXS TLBI operations https://git.kernel.org/kvmarm/kvmarm/c/3cfde36df7ab -- Best, Oliver
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c index 81e0374a4a45b..b3c8d8e04a547 100644 --- a/arch/arm64/kvm/nested.c +++ b/arch/arm64/kvm/nested.c @@ -810,8 +810,8 @@ static u64 limit_nv_id_reg(u32 id, u64 val) break; case SYS_ID_AA64ISAR1_EL1: - /* Support everything but Spec Invalidation */ - val &= ~(GENMASK_ULL(63, 56) | + /* Support everything but Spec Invalidation and LS64 */ + val &= ~(NV_FTR(ISAR1, LS64) | NV_FTR(ISAR1, SPECRES)); break;
Although we now have support for nXS-flavoured TLBI instructions, we still don't expose the feature to the guest thanks to a mixture of misleading comment and use of a bunch of magic values. Fix the comment and correctly express the masking of LS64, which is enough to expose nXS to the world. Not that anyone cares... Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/kvm/nested.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)