From patchwork Fri Jul 12 13:14:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick Fertre X-Patchwork-Id: 13731772 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F8CBC2BD09 for ; Fri, 12 Jul 2024 13:16:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:To:From: Reply-To:Cc:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=S8i/Lg8lwGkalhd/HZ5Iw9958NPeO5Y47s52u8cAvsc=; b=fT3TxqH6LeejMH drii7/pz8j+vo+jUheN0LxyFsjf5qkh00yE2+p6YKjqg1LD7rb68kdwvC7SF20kCDJ/QfOo7krapd ne3WiVbxwnyRLLXPPrWt4P4gdIs/B0eYmGNv1PiPTaXC7/ipmf7fS54Vbt7rC3/Hu7c3ogL/NA8hs +MGBM+IaudwUorq4tNjr/aqO6Oxn8L/Qi1mxiTqYjL1xH2AgHDHUnLdeAVHTvQCwtDyvD30zs0M1W Z8EwYzRxQMKF2+Ve+8+ANvxeaf13NavrTB+MEowO94J9dHO3ZvVg/TXUiDEW1OfyCNuzLTXCZuHtM ESqLf4pPwLY3/DUay5tA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sSG8D-0000000070L-0Tqu; Fri, 12 Jul 2024 13:16:13 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sSG7t-000000006pf-0aHL for linux-arm-kernel@lists.infradead.org; Fri, 12 Jul 2024 13:15:54 +0000 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 46CCPFPl001787; Fri, 12 Jul 2024 15:15:41 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=selector1; bh=S8i/Lg8lwGkalhd/HZ5Iw9 958NPeO5Y47s52u8cAvsc=; b=EirIIQ5c6DNgea278fp+a/clNaD2qis0b5UGJf zwZhn7fx1MjcPWVB3IssJVnhhYLrm8CX4x3knkA+mfI84jI2yTl5WLxdJQMmZGnq 9ENQP1yDkOKhNcsyQU8XI5JK5wKEILL//VMXpV3jyQ2h7Qel5IkVKbrcVzo9/Hl9 esVqCCG6BoeD19VSrSMiiptQz/Jsmj9LWCo5CYzk2fCe6BYVen+m5rlt358dC2c8 ao9nZqtCPPc5jnGdVs7CbXOoeP0zShjEouNZe0oYfiZ93rs51sqlZVGy34W9hBZC XBlrFImsXbn+qY6P+6h8hRw2LVAApM4zBAVxQcMnBhCsF52w== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 406wj3anaa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 12 Jul 2024 15:15:41 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id AC8D14002D; Fri, 12 Jul 2024 15:15:37 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4C35020CB2E; Fri, 12 Jul 2024 15:14:56 +0200 (CEST) Received: from localhost (10.252.16.177) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 12 Jul 2024 15:14:55 +0200 From: Yannick Fertre To: Yannick Fertre , Raphael Gallais-Pou , Philippe Cornu , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre Torgue , , , , Subject: [PATCH] drm/stm: ltdc: remove reload interrupt Date: Fri, 12 Jul 2024 15:14:53 +0200 Message-ID: <20240712131453.98597-1-yannick.fertre@foss.st.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.252.16.177] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-12_09,2024-07-11_01,2024-05-17_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240712_061553_507135_F1E7B4F1 X-CRM114-Status: GOOD ( 12.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The reload interrupt is not used by the driver. To avoid unnecessary calls of the interrupt routine, don't enable it. Solve small typo and add mask to simplify the driver. Signed-off-by: Yannick Fertre --- drivers/gpu/drm/stm/ltdc.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 3876346a1303..3d9842427083 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -169,6 +169,7 @@ #define IER_RRIE BIT(3) /* Register Reload Interrupt Enable */ #define IER_FUEIE BIT(6) /* Fifo Underrun Error Interrupt Enable */ #define IER_CRCIE BIT(7) /* CRC Error Interrupt Enable */ +#define IER_MASK (IER_LIE | IER_FUWIE | IER_TERRIE | IER_RRIE | IER_FUEIE | IER_CRCIE) #define CPSR_CYPOS GENMASK(15, 0) /* Current Y position */ @@ -785,7 +786,7 @@ static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc, regmap_write(ldev->regmap, LTDC_BCCR, BCCR_BCBLACK); /* Enable IRQ */ - regmap_set_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_RRIE | IER_TERRIE); + regmap_set_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_TERRIE); /* Commit shadow registers = update planes at next vblank */ if (!ldev->caps.plane_reg_shadow) @@ -809,8 +810,8 @@ static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc, for (layer_index = 0; layer_index < ldev->caps.nb_layers; layer_index++) regmap_write_bits(ldev->regmap, LTDC_L1CR + layer_index * LAY_OFS, LXCR_MASK, 0); - /* disable IRQ */ - regmap_clear_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_RRIE | IER_TERRIE); + /* Disable IRQ */ + regmap_clear_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_TERRIE); /* immediately commit disable of layers before switching off LTDC */ if (!ldev->caps.plane_reg_shadow) @@ -2016,13 +2017,8 @@ int ltdc_load(struct drm_device *ddev) goto err; } - /* Disable interrupts */ - if (ldev->caps.fifo_threshold) - regmap_clear_bits(ldev->regmap, LTDC_IER, IER_LIE | IER_RRIE | IER_FUWIE | - IER_TERRIE); - else - regmap_clear_bits(ldev->regmap, LTDC_IER, IER_LIE | IER_RRIE | IER_FUWIE | - IER_TERRIE | IER_FUEIE); + /* Disable all interrupts */ + regmap_clear_bits(ldev->regmap, LTDC_IER, IER_MASK); DRM_DEBUG_DRIVER("ltdc hw version 0x%08x\n", ldev->caps.hw_version);