diff mbox series

arm64: dts: imx8mp-beacon-kit: Fix Stereo Audio on WM8962

Message ID 20240714172017.422811-1-aford173@gmail.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mp-beacon-kit: Fix Stereo Audio on WM8962 | expand

Commit Message

Adam Ford July 14, 2024, 5:20 p.m. UTC
The L/R clock needs to be controlled by the SAI3 instead of the
CODEC to properly achieve stereo sound. Doing this allows removes
the need for unnecessary clock manipulation to try to get the
CODEC's clock in sync with the SAI3 clock, since the CODEC can cope
with a wide variety of clock inputs.

Fixes: 161af16c18f3 ("arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock")
Fixes: 69e2f37a6ddc ("arm64: dts: imx8mp-beacon-kit: Enable WM8962 Audio CODEC")
Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Adam Ford July 30, 2024, 1:04 p.m. UTC | #1
On Sun, Jul 14, 2024 at 12:20 PM Adam Ford <aford173@gmail.com> wrote:
>
> The L/R clock needs to be controlled by the SAI3 instead of the
> CODEC to properly achieve stereo sound. Doing this allows removes
> the need for unnecessary clock manipulation to try to get the
> CODEC's clock in sync with the SAI3 clock, since the CODEC can cope
> with a wide variety of clock inputs.

Shawn,

Any chance this could get reviewed and/or applied?

thanks,

adam

>
> Fixes: 161af16c18f3 ("arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock")
> Fixes: 69e2f37a6ddc ("arm64: dts: imx8mp-beacon-kit: Enable WM8962 Audio CODEC")
> Signed-off-by: Adam Ford <aford173@gmail.com>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
> index 1871c10f5c12..de5b64fa479a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
> @@ -222,13 +222,12 @@ sound-wm8962 {
>
>                 simple-audio-card,cpu {
>                         sound-dai = <&sai3>;
> +                       frame-master;
> +                       bitclock-master;
>                 };
>
>                 simple-audio-card,codec {
>                         sound-dai = <&wm8962>;
> -                       clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
> -                       frame-master;
> -                       bitclock-master;
>                 };
>         };
>  };
> @@ -544,10 +543,9 @@ &pcie_phy {
>  &sai3 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_sai3>;
> -       assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
> -                         <&clk IMX8MP_AUDIO_PLL2> ;
> -       assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
> -       assigned-clock-rates = <12288000>, <361267200>;
> +       assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
> +       assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
> +       assigned-clock-rates = <12288000>;
>         fsl,sai-mclk-direction-output;
>         status = "okay";
>  };
> --
> 2.43.0
>
Shawn Guo Aug. 12, 2024, 3:36 a.m. UTC | #2
On Sun, Jul 14, 2024 at 12:20:17PM -0500, Adam Ford wrote:
> The L/R clock needs to be controlled by the SAI3 instead of the
> CODEC to properly achieve stereo sound. Doing this allows removes
> the need for unnecessary clock manipulation to try to get the
> CODEC's clock in sync with the SAI3 clock, since the CODEC can cope
> with a wide variety of clock inputs.
> 
> Fixes: 161af16c18f3 ("arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock")
> Fixes: 69e2f37a6ddc ("arm64: dts: imx8mp-beacon-kit: Enable WM8962 Audio CODEC")
> Signed-off-by: Adam Ford <aford173@gmail.com>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
index 1871c10f5c12..de5b64fa479a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
@@ -222,13 +222,12 @@  sound-wm8962 {
 
 		simple-audio-card,cpu {
 			sound-dai = <&sai3>;
+			frame-master;
+			bitclock-master;
 		};
 
 		simple-audio-card,codec {
 			sound-dai = <&wm8962>;
-			clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
-			frame-master;
-			bitclock-master;
 		};
 	};
 };
@@ -544,10 +543,9 @@  &pcie_phy {
 &sai3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_sai3>;
-	assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
-			  <&clk IMX8MP_AUDIO_PLL2> ;
-	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
-	assigned-clock-rates = <12288000>, <361267200>;
+	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
+	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+	assigned-clock-rates = <12288000>;
 	fsl,sai-mclk-direction-output;
 	status = "okay";
 };