From patchwork Tue Jul 16 21:31:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 13734980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA721C3DA49 for ; Tue, 16 Jul 2024 21:35:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Reply-To:MIME-Version: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=s4kASXYeu1hLSx3lE0MVV3qzd8mYBWhPkWtORo7cgFc=; b=1OQxi/BvVc6Fibky7nUirgPtr5 hQphtXBJ+ziE5hdh1wI/KXjSNDyex/HNlNzHIx/aVqm9MVxShW0JgwxuWOFdAPX3K4YcsuTaAHqg9 K++XhTqOy2O6tSPXuR/Osu66Nipvd73aRvJbgYgADGsCXjfl8dTHo0OCfE2FiOrbGETdGJ81qJg/d 9ITv97hcs+0F19Sxe6DDlMh+2JDhBAFdtdV4SKqPxciat4lELFwjUszpbE9ZbSmeF5Jgb3AK0kRk2 7Ipc1auKKp6tgWG4emfZ7xlnDE3N9tvcHqlHJFujJwxS49gRqtZSz7TNrv9eC4y65xBe4mVD1Rnku VENpvXKw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTppN-0000000Bqjj-3iV5; Tue, 16 Jul 2024 21:35:17 +0000 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTpmK-0000000BpLJ-40yW for linux-arm-kernel@lists.infradead.org; Tue, 16 Jul 2024 21:32:10 +0000 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-75c5bdab7faso3234403a12.1 for ; Tue, 16 Jul 2024 14:32:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1721165528; x=1721770328; darn=lists.infradead.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=s4kASXYeu1hLSx3lE0MVV3qzd8mYBWhPkWtORo7cgFc=; b=UcRFSeMGQAbBLT69zMQkXbiITGNbtekmG3ukJY3ixS9v/fUzvtNDNVIv3vqnbUQsdo gdp/BqyUq2vH9yHq9G084kqLayl9jiAlEuQ0cUPvdNv1vw4eal+CL1S82fnLyrrJCXha 00EF1ZPlq/MIqOXNZFV8xN8LcP3l6mCfcyYQs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721165528; x=1721770328; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=s4kASXYeu1hLSx3lE0MVV3qzd8mYBWhPkWtORo7cgFc=; b=FsBQ/0V6nbhq3QPwMh15KpXyvYzFKeNAEKb32oaT2TwxRoVgYVKa5ObHP4R4hIXmTN 7jYNa6VFgJe7N6ByKW2wRUouk8kfUecOf+Xar7ZhE5VKTfeWuVDTzOzUV5pnrlRc85s+ sK4I94Xe5Aj5+0T2xug5oFw2ZiCwObtWuwvao7Cd+ASyc/qwPqPIXpTHu3hpxCz4tZO1 hI4R7dR/bgD8hEHfhnOhshmkEQnUwwA871MDQ0EEUvK9bE8xGg7JecUmMIiiYBk+Qltz bO4wk8xxmReCJMyan11jGysYpJIcVjr2wscZ2E+4zUYUNaA6xrvPZLiRnR2AU6QauZLQ /cpg== X-Forwarded-Encrypted: i=1; AJvYcCUjTbC2+QEYeqNT0lkotN39+PxiA6imaELAlwOO6g37Q9SuYbfEEcZ0EU4GMauRP1w9I8LRrdLCjqMwsDbFm41ai9vAyIBVIcvW6JpUqDe6seHKyNo= X-Gm-Message-State: AOJu0Yyu7nFmTQjWI+3BYs8R+vcTL/I5nodijGqmmGkFzGUFH2snP0Fp rlrMPrbnOd1Z+A5sYjB31NI33ZHzFnhFYyGTUM39qH5fUYjflYWu9XTuW2G36w== X-Google-Smtp-Source: AGHT+IHMq7sIS5fikUr98UkxmIBVwJilGApJCxfCRLVg1iE2jvb1wLcaHJgx2XWdM6RSZ2NA/mSTgg== X-Received: by 2002:a05:6a21:9985:b0:1be:c947:f17a with SMTP id adf61e73a8af0-1c3f122bb89mr4312395637.24.1721165527534; Tue, 16 Jul 2024 14:32:07 -0700 (PDT) Received: from stbsrv-and-01.and.broadcom.net ([192.19.144.250]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70b7eb9e20fsm6812828b3a.31.2024.07.16.14.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jul 2024 14:32:06 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , Krzysztof Kozlowski , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v4 08/12] PCI: brcmstb: Don't conflate the reset rescal with phy ctrl Date: Tue, 16 Jul 2024 17:31:23 -0400 Message-Id: <20240716213131.6036-9-james.quinlan@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240716213131.6036-1-james.quinlan@broadcom.com> References: <20240716213131.6036-1-james.quinlan@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240716_143209_026589_A4B8F1F5 X-CRM114-Status: GOOD ( 13.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org We've been assuming that if an SOC has a "rescal" reset controller that we should automatically invoke brcm_phy_cntl(...). This will not be true in future SOCs, so we create a bool "has_phy" and adjust the cfg_data appropriately (we need to give 7216 its own cfg_data structure instead of sharing one). Signed-off-by: Jim Quinlan Reviewed-by: Stanimir Varbanov Reviewed-by: Florian Fainelli --- drivers/pci/controller/pcie-brcmstb.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index dfb404748ad8..8ab5a8ca05b4 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -222,6 +222,7 @@ enum pcie_type { struct pcie_cfg_data { const int *offsets; const enum pcie_type type; + const bool has_phy; void (*perst_set)(struct brcm_pcie *pcie, u32 val); void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); }; @@ -272,6 +273,7 @@ struct brcm_pcie { void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); struct subdev_regulators *sr; bool ep_wakeup_capable; + bool has_phy; }; static inline bool is_bmips(const struct brcm_pcie *pcie) @@ -1311,12 +1313,12 @@ static int brcm_phy_cntl(struct brcm_pcie *pcie, const int start) static inline int brcm_phy_start(struct brcm_pcie *pcie) { - return pcie->rescal ? brcm_phy_cntl(pcie, 1) : 0; + return pcie->has_phy ? brcm_phy_cntl(pcie, 1) : 0; } static inline int brcm_phy_stop(struct brcm_pcie *pcie) { - return pcie->rescal ? brcm_phy_cntl(pcie, 0) : 0; + return pcie->has_phy ? brcm_phy_cntl(pcie, 0) : 0; } static void brcm_pcie_turn_off(struct brcm_pcie *pcie) @@ -1559,12 +1561,20 @@ static const struct pcie_cfg_data bcm2711_cfg = { .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; +static const struct pcie_cfg_data bcm7216_cfg = { + .offsets = pcie_offset_bcm7278, + .type = BCM7278, + .perst_set = brcm_pcie_perst_set_7278, + .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_7278, + .has_phy = true, +}; + static const struct of_device_id brcm_pcie_match[] = { { .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg }, { .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg }, { .compatible = "brcm,bcm7211-pcie", .data = &generic_cfg }, { .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg }, - { .compatible = "brcm,bcm7216-pcie", .data = &bcm7278_cfg }, + { .compatible = "brcm,bcm7216-pcie", .data = &bcm7216_cfg }, { .compatible = "brcm,bcm7445-pcie", .data = &generic_cfg }, { .compatible = "brcm,bcm7435-pcie", .data = &bcm7435_cfg }, { .compatible = "brcm,bcm7425-pcie", .data = &bcm7425_cfg }, @@ -1612,6 +1622,7 @@ static int brcm_pcie_probe(struct platform_device *pdev) pcie->type = data->type; pcie->perst_set = data->perst_set; pcie->bridge_sw_init_set = data->bridge_sw_init_set; + pcie->has_phy = data->has_phy; pcie->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pcie->base))