From patchwork Thu Jul 18 07:41:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13736140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C1B9C3DA60 for ; Thu, 18 Jul 2024 07:35:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:MIME-Version:Cc:To: In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type: Subject:Date:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=b3D20n0bAzqcjLjXnBhoWSF/wj8T59kOpyVPxkul4Tg=; b=O0Hh9tOrDDh7emEgheDQWjrkZ+ 2tEuB/hGDSj8sncy+4+QTDJS07sbLIU2eqGJJgZNC8u+KHaOufRuHZ0oyutyNEwXnnU5eZikxVH4H hRt0qspegMAGz6dgPjq2chqgbwFLKwDT5GMXmIxjsBxeemLpKuFVCGaZIUU0sl6kOmNaa4ykrbniz 8Q1uMSor59JTLjWcAFvq3E2ihkRhH0d4GPWajKb4lmOQi82zhjYlWhoBVgVRv6uTBCv0vhfai1BOb 2KbA2Bfc8J0dVhvNETA1M9uNeAugjFep4LqCREMNZVqvuKYx8Bm2c7w55lCkJD0cVxclRHVENXLXU l0RcDXhQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sULf2-0000000GDbR-3Our; Thu, 18 Jul 2024 07:34:46 +0000 Received: from mail-northeuropeazlp170120003.outbound.protection.outlook.com ([2a01:111:f403:c200::3] helo=DU2PR03CU002.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sULdj-0000000GCth-3Wyt for linux-arm-kernel@lists.infradead.org; Thu, 18 Jul 2024 07:33:26 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=jXnrtVlHdVSgBKT3GOT3++aOQpp8PHMDcojzmKEL2zuIF0J7G7Q3CN+edQZfTYUtjRTQ0Qy1ZGs+qQklMVMK1nbp/2D5ZBSBIPA3JM8DXPPe1I9nbX2xW0A9pTRcGqJ9wQ+2tu+6Z8zahde82uMxySs3+1usFXi6FnT6uuZfK1fDwiwdSKH7ACZp+H1PHFrJ0C9+5yhRVYFvY1evA/1SsTlL5waxp6vfMJdYjdzGQA2zCw1Lj7QS8F37PrM0UsSxQm7GeIJbvsxKbKqAbtk7XY7U3cgv+SAGy/TFEKK8WFVv9RTPPe1H+oAnX2o14f7L6QV9dHEK052o72VHjkxoew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=b3D20n0bAzqcjLjXnBhoWSF/wj8T59kOpyVPxkul4Tg=; b=B3xVe1e70fGkfDp8QIozyDqdbNV1lTUgt3ydhDn4UOylqDmT5KK2nKY4AqkG8w1Tck3n2kwnydYbCcse9KcvWaZMH980lJx6WFTFsm2T//7Nc/UlYGMcTiBps3H+2ReIjogw+quCGOLc34bNXPbgI7GAScWfp0NrrF32XEjgXJVLBck3xiVuGTTRQ/YiabQLIC5tgXQkQ2jYQj/UZkOxiCGIhWtPjESM2Xx6RYpn4B6/+AMjPfRmVDX3P3zMVVAWj8FIy7coFWM2LokI7KJX055umZjdOJNL10ljvnKrdV/8/yOZRDP33feLe9eA6eTsTez9KaWhjU6/83KfY7qHUg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector2-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=b3D20n0bAzqcjLjXnBhoWSF/wj8T59kOpyVPxkul4Tg=; b=YDZUtEfi4gaNHmsvQFUTOQuU/ZaUAMULfSmY2kEpv1ExzbwxnL6fH4dAPU0vKiTKqY5kZThv8tpJrY3Ve+/EbjREns14L+NL/9HYCubc46lNJCqzw9if73TSGS3laQDrY3vUgQLLUuhymtD9K8NWvhU7dxDuALi6w/iITWNLNJg= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from PAXPR04MB8459.eurprd04.prod.outlook.com (2603:10a6:102:1da::15) by DU4PR04MB10457.eurprd04.prod.outlook.com (2603:10a6:10:561::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7784.16; Thu, 18 Jul 2024 07:33:18 +0000 Received: from PAXPR04MB8459.eurprd04.prod.outlook.com ([fe80::165a:30a2:5835:9630]) by PAXPR04MB8459.eurprd04.prod.outlook.com ([fe80::165a:30a2:5835:9630%4]) with mapi id 15.20.7762.020; Thu, 18 Jul 2024 07:33:18 +0000 From: "Peng Fan (OSS)" Date: Thu, 18 Jul 2024 15:41:55 +0800 Subject: [PATCH v6 3/7] firmware: arm_scmi: add initial support for i.MX MISC protocol Message-Id: <20240718-imx95-bbm-misc-v2-v6-3-18f008e16e9d@nxp.com> References: <20240718-imx95-bbm-misc-v2-v6-0-18f008e16e9d@nxp.com> In-Reply-To: <20240718-imx95-bbm-misc-v2-v6-0-18f008e16e9d@nxp.com> To: Sudeep Holla , Cristian Marussi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Alexandre Belloni , Dmitry Torokhov Cc: Peng Fan , arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721288528; l=11462; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=Yc9fGdHVGpzX3AJqC0pvTwDCGUbMJnSIzJSsTgCSQww=; b=m1xYcLFP+8Mm7HkSP2yFFGNj0T0uzzH021HBgwUzq/yrQmMTYpzXrxjMH42dBfbv5eNitTKZx kYEJ6cNzF8lC3dP7DJMlycLOIFvVRgF/dNYkab/09lpSHqNtfD6aqJm X-Developer-Key: i=peng.fan@nxp.com; a=ed25519; pk=I4sJg7atIT1g63H7bb5lDRGR2gJW14RKDD0wFL8TT1g= X-ClientProxiedBy: SI1PR02CA0046.apcprd02.prod.outlook.com (2603:1096:4:1f5::14) To PAXPR04MB8459.eurprd04.prod.outlook.com (2603:10a6:102:1da::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB8459:EE_|DU4PR04MB10457:EE_ X-MS-Office365-Filtering-Correlation-Id: c890e55e-5760-49fc-7968-08dca6fbe4c8 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|52116014|376014|7416014|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?q?WVw6DJyPBdGbxQhM3R4BocCv9CCPpIx?= =?utf-8?q?viqjTd7alyttkPoE1rHeh/zobJHN2T0Uxy7w8BI0Qa0hrrC58O+DZwRaRANc7tuU+?= =?utf-8?q?ZOOterkXavkUbJe4wFZltykU7BPzIElwIVgt4LuwxoQxcH/L7VM94mI3dEYn44Vuj?= =?utf-8?q?wG967jXi0ox5X21450GEzt323xCO6/A0S3CB75vkQUjWf2u+g8EgzjbZ4IlXuALXd?= =?utf-8?q?yMHPFaEJ03ZDKdeo4hMJVQ8BegJDJfJefoRmw3W7z1LxXU/nQ1sprILh52gN0YudI?= =?utf-8?q?3Ols+PALysEgyVZ4O2z5ewCdkDLtczrhCxNIHMCo0tjs4SkeLMlufy7t24nwIWjrv?= =?utf-8?q?xt+3CFG2GXs+x1LOygbGZqWAIlnkS8wCP/WQ7zSc+rxiwoCZrg8ogQUqJUhdH0rjr?= =?utf-8?q?SIIvPsibckJC6FCofnlLmmkgrx6AC6/ylxPXeGnjWFAAEGuw8m5h9U6lH+ruBsbxD?= =?utf-8?q?upPDo0NprTeWJcu0AyAkdkh2CUlRaR2pLjwgEY+InIr0Gre/jSNjK9NpLSJCuUd8a?= =?utf-8?q?hYZS6yD4bQ/tLw9buGn/AzkUYVhxd55IvJayaovQp3FnocGicKBRG/GN+R142uIfV?= =?utf-8?q?lKUkQbqkBl15sE7X3fiA5WPh32JMy2F2+nXblzscfP5AQK3On1Vv4GmYxydCbNz93?= =?utf-8?q?X759Jx/UJY26hfHedJoZKuDmJ/NPdfLNHfnwmzETW6BUqPPHqIwuvzXXS7R9+yVzb?= =?utf-8?q?t4HEiaoe+WlY5CUWdRdHcasRgxrFH8fMddRbw3j94wVv3UQZxKAXpnfEn2h1Nhcdl?= =?utf-8?q?bniOOreSQ7Pzeo2otVB8hlMpMGku+tQXEfXyP1nM9ONA6IW0hEGFLn1YNYwl5wrm6?= =?utf-8?q?HQ01VlPnbfvMmOapf2f4s5OpqNtN/Q1QVaX8KFeYGTgqkzUKxdIl8VSgoQ3yQVVw5?= =?utf-8?q?xLu8Xw/wqrwbOFLNIjNktgJ5zWh6CuqqWQZGXTa0TbD0YmhV+QgXMOb3gk7HxS0Aw?= =?utf-8?q?aQr5QWWowi1nMZtwjHDjM1yuAhU0U9XWnoIfM1jZ+ftzISjXRq2TyfikWY9Vs+zhz?= =?utf-8?q?BMy7Vn8u7qP5PxNh5KpnYSXKc6fQd8jkFWMjYfkPdq1Qx8/J1QhLDrM32nOnG9oHI?= =?utf-8?q?+kveEC/AlnuPzcWITZy5MhnV84lCMBPsJ+FuQZzhRxQeb7U45rm7ElrPhokH01zhp?= =?utf-8?q?3rrly3W9z6jiMYNnaHA4lX72SimxYO5mTvSNVtTTWdl7+J04h3eTXWBZRw63KjHnm?= =?utf-8?q?wy4VX7h3wW1I9PNb/tar5/aegbnzIeaG3LtQ1vxSx68AiU0v2yCY/olGTTw09R4IH?= =?utf-8?q?qKzv2Y4mIHDLXyZLvUKBEi+Otc+GOhmwVHd67SlVwtvqBUf7ziLKVep10THyqhRWp?= =?utf-8?q?TQGj+BBB4Syd/NHqCsf6hWN2/lsD60H3YXHTj1vYQZXb+UPWsAQjqzg=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAXPR04MB8459.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(366016)(52116014)(376014)(7416014)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?CznNeFk+6NNcJHaeqqxjDvstm6K2?= =?utf-8?q?Se1ZJqWk1p1mYrUtrDd8IHgRQ9BkqYPvDF6VxZiSr7gw3XsEtSa2mHkdOgtd5OKtP?= =?utf-8?q?iOh/s7za6DKVGs6+LyuCeCkgNWSeXsDlDkFR5bTBSkl9dGW3oYNrt+KGe6xESpNJs?= =?utf-8?q?RkgSPmMfNj8cZetSLxnf3UwhBMvYR0O83bzYJs5IF7bTHLibcorDluOhcvc9wTREB?= =?utf-8?q?iNKDUP+A+te1HCjo/6iUtQQQdbvkZ3KJDC4QWUy+g50mHnxKb7nP0O8hZ1ef3nWIP?= =?utf-8?q?bhaI7n1SxXcMnOV4jIw6Lp+3cPXvpBBY7tfffkQfIrHA4B2vIkG8L3drC1vFFUHCM?= =?utf-8?q?GxaIO1WSJ7jEOUJXTuzYachnpDTPtlBcBBzV1CGPY/VBLimPwoQwT7fAElDcUVujr?= =?utf-8?q?ZPctOawfmxJg1D3aIcyX5jK+GJ+MWOpVw6k4Vx2X69f46WEHgbc7PJgqdQj3KYOqs?= =?utf-8?q?0aJsUdT6Rsm275bsxSqpqYY00Dm/xX2J7jDBX7hPFV0QbtKQambRkwogqr/LG/CLC?= =?utf-8?q?HciD8uKoIg4pzw9EktUp3ibR6RYpQeSCNnnXJOnHatFnwzMURkJhKj1+7jV7X909A?= =?utf-8?q?EJ14PHnTnJ6zWCktnd8lde3EYqxlGVyFor5KTJ69Fnxn+L5rVnft47UhY8YL84rHZ?= =?utf-8?q?Jl5kDNKBG8Lz8Oq6ydfy2jkUH4yr2bRhJoR74s3vtkuuJN4lEadcKZxz7ZMiZWHT+?= =?utf-8?q?qdeT2OjoFsS44TD/OU5eEm8j+eD3FSdR9gCG90Io5OPmPT3CCkAgOATL57itSkUMs?= =?utf-8?q?6mn6lreXthfXpCMc7TfEZVRkP/fuz9YtWF7nHuL8DXoBRtIDELcryvlzJu5xIaAnN?= =?utf-8?q?x0R8SyeOHIn3KAfEapsejqUU1/J/PBSNC11SJeqNCgXLXZrlayzRanuObP9X0TdKk?= =?utf-8?q?RBhrlxGQ5ZquwcWa7UGFa3vhSZmyk3VzFIywjG0UugouhBqWjme0at69dR1xhysjC?= =?utf-8?q?0FocMxiO5z5u92ivCyFteoL+DiLXroBidEOxhtzR+OJm6cWHdvlAvFskdE+lSBh90?= =?utf-8?q?rFMFz0c5IcG8UPfNnKo3pqscxEjVxG26+VfKLwZvB9MzcLB40mEGEBgY152wm8tat?= =?utf-8?q?DtN9LTt5xeEEZuHCrAoFJgRz37lGjZhXvT2MUiY9mO7c88ov7N9/MTJ/fTVHVvxb7?= =?utf-8?q?/gm/nbGLy97klVWUmSyDzzAeUBOZlaoZABzxXNnbXFUNo5LZzMR5K5q1x9sPrBnmu?= =?utf-8?q?A87ocQ51vKK1v7NwBPviBi/gQL1goCob3TPI/tWTjl3Ll7vVgzEhzzfrCQvJTtsi7?= =?utf-8?q?LLBiyYQTLUfYb5CTxlt4qO23gcSv3EyIVMebw9gNFnKRLLHBgjxrDKFSu0e4SdRqn?= =?utf-8?q?ScmBqo3WeJqYX3YRZg2d0I1sio6vIMlQWNT7+j5Ad1kDn0em1/WQjjVxL0n5Yx+De?= =?utf-8?q?yNS7vI7z9in99Pymg3W2chLZhryY5t3Ht3dn10k+KXESw+8d0XPMOHl13iJKjo4ZH?= =?utf-8?q?EZXcN6MsWOKTb94Ma9r3fT0Soji0aVLNcLZdDhOAvkraUmIpg8oP3v1LG57e2NQ2P?= =?utf-8?q?PBEGUe02eijK?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c890e55e-5760-49fc-7968-08dca6fbe4c8 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB8459.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jul 2024 07:33:18.6060 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: gfUK18i/MRBDhPw7/ly87KEvlkZY7KvsazVytarZqlMW+D10d3Wo6T3IBPnpK7e+1/mRNngFLLaT+zqFHZQyXQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU4PR04MB10457 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240718_003324_018577_CBC12457 X-CRM114-Status: GOOD ( 16.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Peng Fan i.MX95 System Manager(SM) firmware includes a SCMI vendor protocol, SCMI MISC protocol which includes controls that are misc settings/actions that must be exposed from the SM to agents. They are device specific and are usually define to access bit fields in various mix block control modules, IOMUX_GPR, and other General Purpose registers, Control Status Registers owned by the SM. Reviewed-by: Cristian Marussi Signed-off-by: Peng Fan --- drivers/firmware/arm_scmi/imx/Kconfig | 9 + drivers/firmware/arm_scmi/imx/Makefile | 1 + drivers/firmware/arm_scmi/imx/imx-sm-misc.c | 315 ++++++++++++++++++++++++++++ include/linux/scmi_imx_protocol.h | 17 ++ 4 files changed, 342 insertions(+) diff --git a/drivers/firmware/arm_scmi/imx/Kconfig b/drivers/firmware/arm_scmi/imx/Kconfig index 4b6ac7febe8f..e9d015859eaa 100644 --- a/drivers/firmware/arm_scmi/imx/Kconfig +++ b/drivers/firmware/arm_scmi/imx/Kconfig @@ -11,4 +11,13 @@ config IMX_SCMI_BBM_EXT This driver can also be built as a module. +config IMX_SCMI_MISC_EXT + tristate "i.MX SCMI MISC EXTENSION" + depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF) + default y if ARCH_MXC + help + This enables i.MX System MISC control logic such as gpio expander + wakeup + + This driver can also be built as a module. endmenu diff --git a/drivers/firmware/arm_scmi/imx/Makefile b/drivers/firmware/arm_scmi/imx/Makefile index a7dbdd20dbb9..d3ee6d544924 100644 --- a/drivers/firmware/arm_scmi/imx/Makefile +++ b/drivers/firmware/arm_scmi/imx/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_IMX_SCMI_BBM_EXT) += imx-sm-bbm.o +obj-$(CONFIG_IMX_SCMI_MISC_EXT) += imx-sm-misc.o diff --git a/drivers/firmware/arm_scmi/imx/imx-sm-misc.c b/drivers/firmware/arm_scmi/imx/imx-sm-misc.c new file mode 100644 index 000000000000..ca79d86d542c --- /dev/null +++ b/drivers/firmware/arm_scmi/imx/imx-sm-misc.c @@ -0,0 +1,315 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * System control and Management Interface (SCMI) NXP MISC Protocol + * + * Copyright 2024 NXP + */ + +#define pr_fmt(fmt) "SCMI Notifications MISC - " fmt + +#include +#include +#include +#include +#include +#include +#include + +#include "../protocols.h" +#include "../notify.h" + +#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x10000 + +#define MAX_MISC_CTRL_SOURCES GENMASK(15, 0) + +enum scmi_imx_misc_protocol_cmd { + SCMI_IMX_MISC_CTRL_SET = 0x3, + SCMI_IMX_MISC_CTRL_GET = 0x4, + SCMI_IMX_MISC_CTRL_NOTIFY = 0x8, +}; + +struct scmi_imx_misc_info { + u32 version; + u32 nr_dev_ctrl; + u32 nr_brd_ctrl; + u32 nr_reason; +}; + +struct scmi_msg_imx_misc_protocol_attributes { + __le32 attributes; +}; + +#define GET_BRD_CTRLS_NR(x) le32_get_bits((x), GENMASK(31, 24)) +#define GET_REASONS_NR(x) le32_get_bits((x), GENMASK(23, 16)) +#define GET_DEV_CTRLS_NR(x) le32_get_bits((x), GENMASK(15, 0)) +#define BRD_CTRL_START_ID BIT(15) + +struct scmi_imx_misc_ctrl_set_in { + __le32 id; + __le32 num; + __le32 value[]; +}; + +struct scmi_imx_misc_ctrl_notify_in { + __le32 ctrl_id; + __le32 flags; +}; + +struct scmi_imx_misc_ctrl_notify_payld { + __le32 ctrl_id; + __le32 flags; +}; + +struct scmi_imx_misc_ctrl_get_out { + __le32 num; + __le32 val[]; +}; + +static int scmi_imx_misc_attributes_get(const struct scmi_protocol_handle *ph, + struct scmi_imx_misc_info *mi) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_imx_misc_protocol_attributes *attr; + + ret = ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0, + sizeof(*attr), &t); + if (ret) + return ret; + + attr = t->rx.buf; + + ret = ph->xops->do_xfer(ph, t); + if (!ret) { + mi->nr_dev_ctrl = GET_DEV_CTRLS_NR(attr->attributes); + mi->nr_brd_ctrl = GET_BRD_CTRLS_NR(attr->attributes); + mi->nr_reason = GET_REASONS_NR(attr->attributes); + dev_info(ph->dev, "i.MX MISC NUM DEV CTRL: %d, NUM BRD CTRL: %d,NUM Reason: %d\n", + mi->nr_dev_ctrl, mi->nr_brd_ctrl, mi->nr_reason); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_misc_ctrl_validate_id(const struct scmi_protocol_handle *ph, + u32 ctrl_id) +{ + struct scmi_imx_misc_info *mi = ph->get_priv(ph); + + /* + * [0, BRD_CTRL_START_ID) is for Dev Ctrl which is SOC related + * [BRD_CTRL_START_ID, 0xffff) is for Board Ctrl which is board related + */ + if ((ctrl_id < BRD_CTRL_START_ID) && (ctrl_id > mi->nr_dev_ctrl)) + return -EINVAL; + if (ctrl_id >= BRD_CTRL_START_ID + mi->nr_brd_ctrl) + return -EINVAL; + + return 0; +} + +static int scmi_imx_misc_ctrl_notify(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 evt_id, u32 flags) +{ + struct scmi_imx_misc_ctrl_notify_in *in; + struct scmi_xfer *t; + int ret; + + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id); + if (ret) + return ret; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_NOTIFY, + sizeof(*in), 0, &t); + if (ret) + return ret; + + in = t->tx.buf; + in->ctrl_id = cpu_to_le32(ctrl_id); + in->flags = cpu_to_le32(flags); + + ret = ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int +scmi_imx_misc_ctrl_set_notify_enabled(const struct scmi_protocol_handle *ph, + u8 evt_id, u32 src_id, bool enable) +{ + int ret; + + /* misc_ctrl_req_notify is for enablement */ + if (enable) + return 0; + + ret = scmi_imx_misc_ctrl_notify(ph, src_id, evt_id, 0); + if (ret) + dev_err(ph->dev, "FAIL_ENABLED - evt[%X] src[%d] - ret:%d\n", + evt_id, src_id, ret); + + return ret; +} + +static void * +scmi_imx_misc_ctrl_fill_custom_report(const struct scmi_protocol_handle *ph, + u8 evt_id, ktime_t timestamp, + const void *payld, size_t payld_sz, + void *report, u32 *src_id) +{ + const struct scmi_imx_misc_ctrl_notify_payld *p = payld; + struct scmi_imx_misc_ctrl_notify_report *r = report; + + if (sizeof(*p) != payld_sz) + return NULL; + + r->timestamp = timestamp; + r->ctrl_id = p->ctrl_id; + r->flags = p->flags; + if (src_id) + *src_id = r->ctrl_id; + dev_dbg(ph->dev, "%s: ctrl_id: %d flags: %d\n", __func__, + r->ctrl_id, r->flags); + + return r; +} + +static const struct scmi_event_ops scmi_imx_misc_event_ops = { + .set_notify_enabled = scmi_imx_misc_ctrl_set_notify_enabled, + .fill_custom_report = scmi_imx_misc_ctrl_fill_custom_report, +}; + +static const struct scmi_event scmi_imx_misc_events[] = { + { + .id = SCMI_EVENT_IMX_MISC_CONTROL, + .max_payld_sz = sizeof(struct scmi_imx_misc_ctrl_notify_payld), + .max_report_sz = sizeof(struct scmi_imx_misc_ctrl_notify_report), + }, +}; + +static struct scmi_protocol_events scmi_imx_misc_protocol_events = { + .queue_sz = SCMI_PROTO_QUEUE_SZ, + .ops = &scmi_imx_misc_event_ops, + .evts = scmi_imx_misc_events, + .num_events = ARRAY_SIZE(scmi_imx_misc_events), + .num_sources = MAX_MISC_CTRL_SOURCES, +}; + +static int scmi_imx_misc_ctrl_get(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 *num, u32 *val) +{ + struct scmi_imx_misc_ctrl_get_out *out; + struct scmi_xfer *t; + int ret, i; + int max_msg_size = ph->hops->get_max_msg_size(ph); + int max_num = (max_msg_size - sizeof(*out)) / sizeof(__le32); + + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id); + if (ret) + return ret; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_GET, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(ctrl_id, t->tx.buf); + ret = ph->xops->do_xfer(ph, t); + if (!ret) { + out = t->rx.buf; + *num = le32_to_cpu(out->num); + + if (*num >= max_num || + *num * sizeof(__le32) > t->rx.len - sizeof(__le32)) { + ph->xops->xfer_put(ph, t); + return -EINVAL; + } + + for (i = 0; i < *num; i++) + val[i] = le32_to_cpu(out->val[i]); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_misc_ctrl_set(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 num, u32 *val) +{ + struct scmi_imx_misc_ctrl_set_in *in; + struct scmi_xfer *t; + int ret, i; + int max_msg_size = ph->hops->get_max_msg_size(ph); + int max_num = (max_msg_size - sizeof(*in)) / sizeof(__le32); + + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id); + if (ret) + return ret; + + if (num > max_num) + return -EINVAL; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_SET, sizeof(*in), + 0, &t); + if (ret) + return ret; + + in = t->tx.buf; + in->id = cpu_to_le32(ctrl_id); + in->num = cpu_to_le32(num); + for (i = 0; i < num; i++) + in->value[i] = cpu_to_le32(val[i]); + + ret = ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static const struct scmi_imx_misc_proto_ops scmi_imx_misc_proto_ops = { + .misc_ctrl_set = scmi_imx_misc_ctrl_set, + .misc_ctrl_get = scmi_imx_misc_ctrl_get, + .misc_ctrl_req_notify = scmi_imx_misc_ctrl_notify, +}; + +static int scmi_imx_misc_protocol_init(const struct scmi_protocol_handle *ph) +{ + struct scmi_imx_misc_info *minfo; + u32 version; + int ret; + + ret = ph->xops->version_get(ph, &version); + if (ret) + return ret; + + dev_info(ph->dev, "NXP SM MISC Version %d.%d\n", + PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); + + minfo = devm_kzalloc(ph->dev, sizeof(*minfo), GFP_KERNEL); + if (!minfo) + return -ENOMEM; + + ret = scmi_imx_misc_attributes_get(ph, minfo); + if (ret) + return ret; + + return ph->set_priv(ph, minfo, version); +} + +static const struct scmi_protocol scmi_imx_misc = { + .id = SCMI_PROTOCOL_IMX_MISC, + .owner = THIS_MODULE, + .instance_init = &scmi_imx_misc_protocol_init, + .ops = &scmi_imx_misc_proto_ops, + .events = &scmi_imx_misc_protocol_events, + .supported_version = SCMI_PROTOCOL_SUPPORTED_VERSION, + .vendor_id = "NXP", + .sub_vendor_id = "IMX", +}; +module_scmi_protocol(scmi_imx_misc); diff --git a/include/linux/scmi_imx_protocol.h b/include/linux/scmi_imx_protocol.h index 2df2ea0f1809..066216f1357a 100644 --- a/include/linux/scmi_imx_protocol.h +++ b/include/linux/scmi_imx_protocol.h @@ -15,6 +15,7 @@ enum scmi_nxp_protocol { SCMI_PROTOCOL_IMX_BBM = 0x81, + SCMI_PROTOCOL_IMX_MISC = 0x84, }; struct scmi_imx_bbm_proto_ops { @@ -30,6 +31,7 @@ struct scmi_imx_bbm_proto_ops { enum scmi_nxp_notification_events { SCMI_EVENT_IMX_BBM_RTC = 0x0, SCMI_EVENT_IMX_BBM_BUTTON = 0x1, + SCMI_EVENT_IMX_MISC_CONTROL = 0x0, }; struct scmi_imx_bbm_notif_report { @@ -39,4 +41,19 @@ struct scmi_imx_bbm_notif_report { unsigned int rtc_id; unsigned int rtc_evt; }; + +struct scmi_imx_misc_ctrl_notify_report { + ktime_t timestamp; + unsigned int ctrl_id; + unsigned int flags; +}; + +struct scmi_imx_misc_proto_ops { + int (*misc_ctrl_set)(const struct scmi_protocol_handle *ph, u32 id, + u32 num, u32 *val); + int (*misc_ctrl_get)(const struct scmi_protocol_handle *ph, u32 id, + u32 *num, u32 *val); + int (*misc_ctrl_req_notify)(const struct scmi_protocol_handle *ph, + u32 ctrl_id, u32 evt_id, u32 flags); +}; #endif