Message ID | 20240718035017.434996-2-shahuang@redhat.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Allow userspace to change ID_AA64PFR1_EL1 | expand |
Hi Shaoqin, On Wed, Jul 17, 2024 at 11:50:14PM -0400, Shaoqin Huang wrote: > For some of the fields in the ID_AA64PFR1_EL1 register, KVM doesn't know > how to handle them right now. So explicitly disable them in the register > accessor, then those fields value will be masked to 0 even if on the > hardware the field value is 1. It is probably important to note that the only reason this is safe to do from a UAPI POV is that read_sanitised_ftr_reg() doesn't yet return a nonzero value for any of these fields.
Hi Oliver, On 7/18/24 14:09, Oliver Upton wrote: > Hi Shaoqin, > > On Wed, Jul 17, 2024 at 11:50:14PM -0400, Shaoqin Huang wrote: >> For some of the fields in the ID_AA64PFR1_EL1 register, KVM doesn't know >> how to handle them right now. So explicitly disable them in the register >> accessor, then those fields value will be masked to 0 even if on the >> hardware the field value is 1. > > It is probably important to note that the only reason this is safe to do > from a UAPI POV is that read_sanitised_ftr_reg() doesn't yet return a > nonzero value for any of these fields. (Reply again by the plain text) Yeah. That would be more clear if I tell the reader this information. Will add this when updating. Thanks, Shaoqin >
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 22b45a15d068..4508288b9d38 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1531,6 +1531,14 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu, val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE); val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_RNDR_trap); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_NMI); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE_frac); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_GCS); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_THE); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTEX); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_DF2); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_PFAR); break; case SYS_ID_AA64ISAR1_EL1: if (!vcpu_has_ptrauth(vcpu))
For some of the fields in the ID_AA64PFR1_EL1 register, KVM doesn't know how to handle them right now. So explicitly disable them in the register accessor, then those fields value will be masked to 0 even if on the hardware the field value is 1. This will benifit the migration if the host and VM have different values when restoring a VM. Those fields include RNDR_trap, NMI, MTE_frac, GCS, THE, MTEX, DF2, PFAR. Signed-off-by: Shaoqin Huang <shahuang@redhat.com> --- arch/arm64/kvm/sys_regs.c | 8 ++++++++ 1 file changed, 8 insertions(+)