| Message ID | 20240724041428.573748-1-anshuman.khandual@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64/mm: Drop TCR_SMP_FLAGS | expand |
On 24/07/2024 05:14, Anshuman Khandual wrote: > Earlier TCR_SMP_FLAGS gets conditionally set as TCR_SHARED with CONFIG_SMP. > Currently CONFIG_SMP is always enabled on arm64 platforms, hence drop this > indirection via TCR_SMP_FLAGS and instead always directly use TCR_SHARED. > > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> > Cc: Ryan Roberts <ryan.roberts@arm.com> > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Ryan Roberts <ryan.roberts@arm.com> > --- > arch/arm64/mm/proc.S | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S > index f4bc6c5bac06..8abdc7fed321 100644 > --- a/arch/arm64/mm/proc.S > +++ b/arch/arm64/mm/proc.S > @@ -36,8 +36,6 @@ > #define TCR_KASLR_FLAGS 0 > #endif > > -#define TCR_SMP_FLAGS TCR_SHARED > - > /* PTWs cacheable, inner/outer WBWA */ > #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA > > @@ -469,7 +467,7 @@ SYM_FUNC_START(__cpu_setup) > tcr .req x16 > mov_q mair, MAIR_EL1_SET > mov_q tcr, TCR_T0SZ(IDMAP_VA_BITS) | TCR_T1SZ(VA_BITS_MIN) | TCR_CACHE_FLAGS | \ > - TCR_SMP_FLAGS | TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ > + TCR_SHARED | TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ > TCR_TBI0 | TCR_A1 | TCR_KASAN_SW_FLAGS | TCR_MTE_FLAGS > > tcr_clear_errata_bits tcr, x9, x5
On Wed, 24 Jul 2024 09:44:28 +0530, Anshuman Khandual wrote: > Earlier TCR_SMP_FLAGS gets conditionally set as TCR_SHARED with CONFIG_SMP. > Currently CONFIG_SMP is always enabled on arm64 platforms, hence drop this > indirection via TCR_SMP_FLAGS and instead always directly use TCR_SHARED. > > Applied to arm64 (for-next/misc), thanks! [1/1] arm64/mm: Drop TCR_SMP_FLAGS https://git.kernel.org/arm64/c/6ac96d6f9a8e Cheers,
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index f4bc6c5bac06..8abdc7fed321 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -36,8 +36,6 @@ #define TCR_KASLR_FLAGS 0 #endif -#define TCR_SMP_FLAGS TCR_SHARED - /* PTWs cacheable, inner/outer WBWA */ #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA @@ -469,7 +467,7 @@ SYM_FUNC_START(__cpu_setup) tcr .req x16 mov_q mair, MAIR_EL1_SET mov_q tcr, TCR_T0SZ(IDMAP_VA_BITS) | TCR_T1SZ(VA_BITS_MIN) | TCR_CACHE_FLAGS | \ - TCR_SMP_FLAGS | TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ + TCR_SHARED | TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ TCR_TBI0 | TCR_A1 | TCR_KASAN_SW_FLAGS | TCR_MTE_FLAGS tcr_clear_errata_bits tcr, x9, x5
Earlier TCR_SMP_FLAGS gets conditionally set as TCR_SHARED with CONFIG_SMP. Currently CONFIG_SMP is always enabled on arm64 platforms, hence drop this indirection via TCR_SMP_FLAGS and instead always directly use TCR_SHARED. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> --- arch/arm64/mm/proc.S | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)