diff mbox series

arm64: dts: mediatek: mt8186: Fix supported-hw mask for GPU OPPs

Message ID 20240725072243.173104-1-angelogioacchino.delregno@collabora.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: mediatek: mt8186: Fix supported-hw mask for GPU OPPs | expand

Commit Message

AngeloGioacchino Del Regno July 25, 2024, 7:22 a.m. UTC
The speedbin eFuse reads a value 'x' from 0 to 7 and, in order to
make that compatible with opp-supported-hw, it gets post processed
as BIT(x).

Change all of the 0x30 supported-hw to 0x20 to avoid getting
duplicate OPPs for speedbin 4, and also change all of the 0x8 to
0xcf because speedbins different from 4 and 5 do support 900MHz,
950MHz, 1000MHz with the higher voltage of 850mV, 900mV, 950mV
respectively.

Fixes: f38ea593ad0d ("arm64: dts: mediatek: mt8186: Wire up GPU voltage/frequency scaling")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8186.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

Comments

Alper Nebi Yasak Aug. 28, 2024, 8:11 a.m. UTC | #1
Hi,

On 2024-07-25 10:22 +03:00, AngeloGioacchino Del Regno wrote:
> The speedbin eFuse reads a value 'x' from 0 to 7 and, in order to
> make that compatible with opp-supported-hw, it gets post processed
> as BIT(x).
> 
> Change all of the 0x30 supported-hw to 0x20 to avoid getting
> duplicate OPPs for speedbin 4, and also change all of the 0x8 to
> 0xcf because speedbins different from 4 and 5 do support 900MHz,
> 950MHz, 1000MHz with the higher voltage of 850mV, 900mV, 950mV
> respectively.
> 
> Fixes: f38ea593ad0d ("arm64: dts: mediatek: mt8186: Wire up GPU voltage/frequency scaling")
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---

Tested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>

Appears to work on my magneton, I can see "Mali-G52 r1 (Panfrost)" as
the OpenGL renderer in various programs after this patch.

>  arch/arm64/boot/dts/mediatek/mt8186.dtsi | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index 4763ed5dc86c..d63a9defe73e 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -731,7 +731,7 @@ opp-850000000 {
>  		opp-900000000-3 {
>  			opp-hz = /bits/ 64 <900000000>;
>  			opp-microvolt = <850000>;
> -			opp-supported-hw = <0x8>;
> +			opp-supported-hw = <0xcf>;
>  		};
>  
>  		opp-900000000-4 {
> @@ -743,13 +743,13 @@ opp-900000000-4 {
>  		opp-900000000-5 {
>  			opp-hz = /bits/ 64 <900000000>;
>  			opp-microvolt = <825000>;
> -			opp-supported-hw = <0x30>;
> +			opp-supported-hw = <0x20>;
>  		};
>  
>  		opp-950000000-3 {
>  			opp-hz = /bits/ 64 <950000000>;
>  			opp-microvolt = <900000>;
> -			opp-supported-hw = <0x8>;
> +			opp-supported-hw = <0xcf>;
>  		};
>  
>  		opp-950000000-4 {
> @@ -761,13 +761,13 @@ opp-950000000-4 {
>  		opp-950000000-5 {
>  			opp-hz = /bits/ 64 <950000000>;
>  			opp-microvolt = <850000>;
> -			opp-supported-hw = <0x30>;
> +			opp-supported-hw = <0x20>;
>  		};
>  
>  		opp-1000000000-3 {
>  			opp-hz = /bits/ 64 <1000000000>;
>  			opp-microvolt = <950000>;
> -			opp-supported-hw = <0x8>;
> +			opp-supported-hw = <0xcf>;
>  		};
>  
>  		opp-1000000000-4 {
> @@ -779,7 +779,7 @@ opp-1000000000-4 {
>  		opp-1000000000-5 {
>  			opp-hz = /bits/ 64 <1000000000>;
>  			opp-microvolt = <875000>;
> -			opp-supported-hw = <0x30>;
> +			opp-supported-hw = <0x20>;
>  		};
>  	};
>
Matthias Brugger Sept. 2, 2024, 4:07 p.m. UTC | #2
On 25/07/2024 09:22, AngeloGioacchino Del Regno wrote:
> The speedbin eFuse reads a value 'x' from 0 to 7 and, in order to
> make that compatible with opp-supported-hw, it gets post processed
> as BIT(x).
> 
> Change all of the 0x30 supported-hw to 0x20 to avoid getting
> duplicate OPPs for speedbin 4, and also change all of the 0x8 to
> 0xcf because speedbins different from 4 and 5 do support 900MHz,
> 950MHz, 1000MHz with the higher voltage of 850mV, 900mV, 950mV
> respectively.
> 
> Fixes: f38ea593ad0d ("arm64: dts: mediatek: mt8186: Wire up GPU voltage/frequency scaling")
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Patch got applied and is queued for v6.12 (v6.11-next/dts64 branch).
Somehow no email was send to inform about this.

Angelo, not sure if it's worth investigating what happened.

Regards,
Matthias

> ---
>   arch/arm64/boot/dts/mediatek/mt8186.dtsi | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index 4763ed5dc86c..d63a9defe73e 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -731,7 +731,7 @@ opp-850000000 {
>   		opp-900000000-3 {
>   			opp-hz = /bits/ 64 <900000000>;
>   			opp-microvolt = <850000>;
> -			opp-supported-hw = <0x8>;
> +			opp-supported-hw = <0xcf>;
>   		};
>   
>   		opp-900000000-4 {
> @@ -743,13 +743,13 @@ opp-900000000-4 {
>   		opp-900000000-5 {
>   			opp-hz = /bits/ 64 <900000000>;
>   			opp-microvolt = <825000>;
> -			opp-supported-hw = <0x30>;
> +			opp-supported-hw = <0x20>;
>   		};
>   
>   		opp-950000000-3 {
>   			opp-hz = /bits/ 64 <950000000>;
>   			opp-microvolt = <900000>;
> -			opp-supported-hw = <0x8>;
> +			opp-supported-hw = <0xcf>;
>   		};
>   
>   		opp-950000000-4 {
> @@ -761,13 +761,13 @@ opp-950000000-4 {
>   		opp-950000000-5 {
>   			opp-hz = /bits/ 64 <950000000>;
>   			opp-microvolt = <850000>;
> -			opp-supported-hw = <0x30>;
> +			opp-supported-hw = <0x20>;
>   		};
>   
>   		opp-1000000000-3 {
>   			opp-hz = /bits/ 64 <1000000000>;
>   			opp-microvolt = <950000>;
> -			opp-supported-hw = <0x8>;
> +			opp-supported-hw = <0xcf>;
>   		};
>   
>   		opp-1000000000-4 {
> @@ -779,7 +779,7 @@ opp-1000000000-4 {
>   		opp-1000000000-5 {
>   			opp-hz = /bits/ 64 <1000000000>;
>   			opp-microvolt = <875000>;
> -			opp-supported-hw = <0x30>;
> +			opp-supported-hw = <0x20>;
>   		};
>   	};
>
AngeloGioacchino Del Regno Sept. 6, 2024, 8:09 a.m. UTC | #3
Il 02/09/24 18:07, Matthias Brugger ha scritto:
> 
> 
> On 25/07/2024 09:22, AngeloGioacchino Del Regno wrote:
>> The speedbin eFuse reads a value 'x' from 0 to 7 and, in order to
>> make that compatible with opp-supported-hw, it gets post processed
>> as BIT(x).
>>
>> Change all of the 0x30 supported-hw to 0x20 to avoid getting
>> duplicate OPPs for speedbin 4, and also change all of the 0x8 to
>> 0xcf because speedbins different from 4 and 5 do support 900MHz,
>> 950MHz, 1000MHz with the higher voltage of 850mV, 900mV, 950mV
>> respectively.
>>
>> Fixes: f38ea593ad0d ("arm64: dts: mediatek: mt8186: Wire up GPU voltage/frequency 
>> scaling")
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> 
> Patch got applied and is queued for v6.12 (v6.11-next/dts64 branch).
> Somehow no email was send to inform about this.
> 
> Angelo, not sure if it's worth investigating what happened.
> 

Thanks for that, yes I checked and I know what went wrong - shouldn't happen
anymore :-)

Cheers!
Angelo

> Regards,
> Matthias
> 
>> ---
>>   arch/arm64/boot/dts/mediatek/mt8186.dtsi | 12 ++++++------
>>   1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi 
>> b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
>> index 4763ed5dc86c..d63a9defe73e 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
>> @@ -731,7 +731,7 @@ opp-850000000 {
>>           opp-900000000-3 {
>>               opp-hz = /bits/ 64 <900000000>;
>>               opp-microvolt = <850000>;
>> -            opp-supported-hw = <0x8>;
>> +            opp-supported-hw = <0xcf>;
>>           };
>>           opp-900000000-4 {
>> @@ -743,13 +743,13 @@ opp-900000000-4 {
>>           opp-900000000-5 {
>>               opp-hz = /bits/ 64 <900000000>;
>>               opp-microvolt = <825000>;
>> -            opp-supported-hw = <0x30>;
>> +            opp-supported-hw = <0x20>;
>>           };
>>           opp-950000000-3 {
>>               opp-hz = /bits/ 64 <950000000>;
>>               opp-microvolt = <900000>;
>> -            opp-supported-hw = <0x8>;
>> +            opp-supported-hw = <0xcf>;
>>           };
>>           opp-950000000-4 {
>> @@ -761,13 +761,13 @@ opp-950000000-4 {
>>           opp-950000000-5 {
>>               opp-hz = /bits/ 64 <950000000>;
>>               opp-microvolt = <850000>;
>> -            opp-supported-hw = <0x30>;
>> +            opp-supported-hw = <0x20>;
>>           };
>>           opp-1000000000-3 {
>>               opp-hz = /bits/ 64 <1000000000>;
>>               opp-microvolt = <950000>;
>> -            opp-supported-hw = <0x8>;
>> +            opp-supported-hw = <0xcf>;
>>           };
>>           opp-1000000000-4 {
>> @@ -779,7 +779,7 @@ opp-1000000000-4 {
>>           opp-1000000000-5 {
>>               opp-hz = /bits/ 64 <1000000000>;
>>               opp-microvolt = <875000>;
>> -            opp-supported-hw = <0x30>;
>> +            opp-supported-hw = <0x20>;
>>           };
>>       };
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 4763ed5dc86c..d63a9defe73e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -731,7 +731,7 @@  opp-850000000 {
 		opp-900000000-3 {
 			opp-hz = /bits/ 64 <900000000>;
 			opp-microvolt = <850000>;
-			opp-supported-hw = <0x8>;
+			opp-supported-hw = <0xcf>;
 		};
 
 		opp-900000000-4 {
@@ -743,13 +743,13 @@  opp-900000000-4 {
 		opp-900000000-5 {
 			opp-hz = /bits/ 64 <900000000>;
 			opp-microvolt = <825000>;
-			opp-supported-hw = <0x30>;
+			opp-supported-hw = <0x20>;
 		};
 
 		opp-950000000-3 {
 			opp-hz = /bits/ 64 <950000000>;
 			opp-microvolt = <900000>;
-			opp-supported-hw = <0x8>;
+			opp-supported-hw = <0xcf>;
 		};
 
 		opp-950000000-4 {
@@ -761,13 +761,13 @@  opp-950000000-4 {
 		opp-950000000-5 {
 			opp-hz = /bits/ 64 <950000000>;
 			opp-microvolt = <850000>;
-			opp-supported-hw = <0x30>;
+			opp-supported-hw = <0x20>;
 		};
 
 		opp-1000000000-3 {
 			opp-hz = /bits/ 64 <1000000000>;
 			opp-microvolt = <950000>;
-			opp-supported-hw = <0x8>;
+			opp-supported-hw = <0xcf>;
 		};
 
 		opp-1000000000-4 {
@@ -779,7 +779,7 @@  opp-1000000000-4 {
 		opp-1000000000-5 {
 			opp-hz = /bits/ 64 <1000000000>;
 			opp-microvolt = <875000>;
-			opp-supported-hw = <0x30>;
+			opp-supported-hw = <0x20>;
 		};
 	};