@@ -1159,6 +1159,11 @@ icssg0_mii_g_rt: mii-g-rt@33000 {
reg = <0x33000 0x1000>;
};
+ icssg0_pa_stats: pa-stats@2c000 {
+ compatible = "ti,pruss-pa-st", "syscon";
+ reg = <0x2c000 0x1000>;
+ };
+
icssg0_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;
@@ -1325,6 +1330,11 @@ icssg1_mii_g_rt: mii-g-rt@33000 {
reg = <0x33000 0x1000>;
};
+ icssg1_pa_stats: pa-stats@2c000 {
+ compatible = "ti,pruss-pa-st", "syscon";
+ reg = <0x2c000 0x1000>;
+ };
+
icssg1_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;
@@ -1491,6 +1501,11 @@ icssg2_mii_g_rt: mii-g-rt@33000 {
reg = <0x33000 0x1000>;
};
+ icssg2_pa_stats: pa-stats@2c000 {
+ compatible = "ti,pruss-pa-st", "syscon";
+ reg = <0x2c000 0x1000>;
+ };
+
icssg2_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;