From patchwork Mon Jul 29 14:20:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13745031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3104C3DA7E for ; Mon, 29 Jul 2024 14:26:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=XF7ZThYLSlIm1RWwY+vjDfKpa9VxBTeErEIk/Q4bWKk=; b=FNxUbgsZLP0WiePZhVDCwlehY1 xK3EQu2LXxDyQRaidyPYjd27Zt+drbY9e2pqmEUJakI2ttpXJJITt3hTkJPuv8aarw0whjHZY3cd8 LbaHRuXKJAf9QPEqqVDvER1DzOQte9PUDsYroPEn6a5V+hf2XvbpmmEW8DnKzptZBtVc/4tVeou3K Qoxf2kt24ypL2iRWmHs8UIgIiWMrH2PnFNTzjpJsjX1CKmLRde8Qdfo8OI4L7K/d66HcH/9t1A4yg SJjtjH5Kr5YDLfcMsmdBzN3VhSNxmyFjTtxQ3+d4hx93pOFXlawtNvfDt61JDazzhyGgeWbPCpo3n nHrv8D3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRKk-0000000BaBH-005a; Mon, 29 Jul 2024 14:26:42 +0000 Received: from relay1-d.mail.gandi.net ([2001:4b98:dc4:8::221]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRFd-0000000BXgV-0ZMr for linux-arm-kernel@lists.infradead.org; Mon, 29 Jul 2024 14:21:27 +0000 Received: by mail.gandi.net (Postfix) with ESMTPA id F3C39240011; Mon, 29 Jul 2024 14:21:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1722262882; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XF7ZThYLSlIm1RWwY+vjDfKpa9VxBTeErEIk/Q4bWKk=; b=OYCGOrwLM2XfZ1Qgevu9CnKhI3Sujmyzxe0WiowErWqrsNx5k6EYFpS91HObS6XziTRQvw 6tSIRLY0W5a6GIfyyZwupcZMeUVhBrnfTQnrLvVO/mtoQqOk2q7adnRM8oG5sU9W2zRJHa XupLWJdlkhkJupHuLg9Eohhpuf8Bcg1JW+C+ZpAKtiixp6YgE3qtkwaSG7SjjO2FxR5OaH AocN7KZJvfaQjh7HtLeOYOJ//ao2dx2rShwWjU41wsMpySLd8eeC+WA57V+igw5tppVx+c Hc0lFeni1agup8l88mtTdfEq9MlGJSAhVFW/t3H13mD8AqxUYYxGV1WxP4hFTQ== From: Herve Codina To: Herve Codina , Christophe Leroy , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Qiang Zhao , Li Yang , Mark Brown Cc: linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni Subject: [PATCH v1 10/36] soc: fsl: cpm1: tsa: Make SIRAM entries specific to CPM1 Date: Mon, 29 Jul 2024 16:20:39 +0200 Message-ID: <20240729142107.104574-11-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240729142107.104574-1-herve.codina@bootlin.com> References: <20240729142107.104574-1-herve.codina@bootlin.com> MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240729_072125_569686_E885C21E X-CRM114-Status: GOOD ( 14.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Current code handles the CPM1 version of TSA. Compared against QUICC Engine (QE) version of TSA, CPM1 SIRAM entries are slightly different. In order to prepare the support for the QE version, clearly identify these entries and functions handling them as CPM1 compatible. Signed-off-by: Herve Codina --- drivers/soc/fsl/qe/tsa.c | 75 ++++++++++++++++++++++++---------------- 1 file changed, 46 insertions(+), 29 deletions(-) diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c index 3d0c31a62dbb..bf7354ebaca4 100644 --- a/drivers/soc/fsl/qe/tsa.c +++ b/drivers/soc/fsl/qe/tsa.c @@ -18,18 +18,18 @@ #include #include -/* TSA SI RAM routing tables entry */ -#define TSA_SIRAM_ENTRY_LAST BIT(16) -#define TSA_SIRAM_ENTRY_BYTE BIT(17) -#define TSA_SIRAM_ENTRY_CNT_MASK GENMASK(21, 18) -#define TSA_SIRAM_ENTRY_CNT(x) FIELD_PREP(TSA_SIRAM_ENTRY_CNT_MASK, x) -#define TSA_SIRAM_ENTRY_CSEL_MASK GENMASK(24, 22) -#define TSA_SIRAM_ENTRY_CSEL_NU FIELD_PREP_CONST(TSA_SIRAM_ENTRY_CSEL_MASK, 0x0) -#define TSA_SIRAM_ENTRY_CSEL_SCC2 FIELD_PREP_CONST(TSA_SIRAM_ENTRY_CSEL_MASK, 0x2) -#define TSA_SIRAM_ENTRY_CSEL_SCC3 FIELD_PREP_CONST(TSA_SIRAM_ENTRY_CSEL_MASK, 0x3) -#define TSA_SIRAM_ENTRY_CSEL_SCC4 FIELD_PREP_CONST(TSA_SIRAM_ENTRY_CSEL_MASK, 0x4) -#define TSA_SIRAM_ENTRY_CSEL_SMC1 FIELD_PREP_CONST(TSA_SIRAM_ENTRY_CSEL_MASK, 0x5) -#define TSA_SIRAM_ENTRY_CSEL_SMC2 FIELD_PREP_CONST(TSA_SIRAM_ENTRY_CSEL_MASK, 0x6) +/* TSA SI RAM routing tables entry (CPM1) */ +#define TSA_CPM1_SIRAM_ENTRY_LAST BIT(16) +#define TSA_CPM1_SIRAM_ENTRY_BYTE BIT(17) +#define TSA_CPM1_SIRAM_ENTRY_CNT_MASK GENMASK(21, 18) +#define TSA_CPM1_SIRAM_ENTRY_CNT(x) FIELD_PREP(TSA_CPM1_SIRAM_ENTRY_CNT_MASK, x) +#define TSA_CPM1_SIRAM_ENTRY_CSEL_MASK GENMASK(24, 22) +#define TSA_CPM1_SIRAM_ENTRY_CSEL_NU FIELD_PREP_CONST(TSA_CPM1_SIRAM_ENTRY_CSEL_MASK, 0x0) +#define TSA_CPM1_SIRAM_ENTRY_CSEL_SCC2 FIELD_PREP_CONST(TSA_CPM1_SIRAM_ENTRY_CSEL_MASK, 0x2) +#define TSA_CPM1_SIRAM_ENTRY_CSEL_SCC3 FIELD_PREP_CONST(TSA_CPM1_SIRAM_ENTRY_CSEL_MASK, 0x3) +#define TSA_CPM1_SIRAM_ENTRY_CSEL_SCC4 FIELD_PREP_CONST(TSA_CPM1_SIRAM_ENTRY_CSEL_MASK, 0x4) +#define TSA_CPM1_SIRAM_ENTRY_CSEL_SMC1 FIELD_PREP_CONST(TSA_CPM1_SIRAM_ENTRY_CSEL_MASK, 0x5) +#define TSA_CPM1_SIRAM_ENTRY_CSEL_SMC2 FIELD_PREP_CONST(TSA_CPM1_SIRAM_ENTRY_CSEL_MASK, 0x6) /* SI mode register (32 bits) */ #define TSA_SIMODE 0x00 @@ -228,8 +228,8 @@ int tsa_serial_get_info(struct tsa_serial *tsa_serial, struct tsa_serial_info *i } EXPORT_SYMBOL(tsa_serial_get_info); -static void tsa_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area, - u32 tdms, u32 tdm_id, bool is_rx) +static void tsa_cpm1_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area, + u32 tdms, u32 tdm_id, bool is_rx) { resource_size_t quarter; resource_size_t half; @@ -280,7 +280,13 @@ static void tsa_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area } } -static const char *tsa_serial_id2name(struct tsa *tsa, u32 serial_id) +static void tsa_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area, + u32 tdms, u32 tdm_id, bool is_rx) +{ + tsa_cpm1_init_entries_area(tsa, area, tdms, tdm_id, is_rx); +} + +static const char *tsa_cpm1_serial_id2name(struct tsa *tsa, u32 serial_id) { switch (serial_id) { case FSL_CPM_TSA_NU: return "Not used"; @@ -295,22 +301,27 @@ static const char *tsa_serial_id2name(struct tsa *tsa, u32 serial_id) return NULL; } -static u32 tsa_serial_id2csel(struct tsa *tsa, u32 serial_id) +static const char *tsa_serial_id2name(struct tsa *tsa, u32 serial_id) +{ + return tsa_cpm1_serial_id2name(tsa, serial_id); +} + +static u32 tsa_cpm1_serial_id2csel(struct tsa *tsa, u32 serial_id) { switch (serial_id) { - case FSL_CPM_TSA_SCC2: return TSA_SIRAM_ENTRY_CSEL_SCC2; - case FSL_CPM_TSA_SCC3: return TSA_SIRAM_ENTRY_CSEL_SCC3; - case FSL_CPM_TSA_SCC4: return TSA_SIRAM_ENTRY_CSEL_SCC4; - case FSL_CPM_TSA_SMC1: return TSA_SIRAM_ENTRY_CSEL_SMC1; - case FSL_CPM_TSA_SMC2: return TSA_SIRAM_ENTRY_CSEL_SMC2; + case FSL_CPM_TSA_SCC2: return TSA_CPM1_SIRAM_ENTRY_CSEL_SCC2; + case FSL_CPM_TSA_SCC3: return TSA_CPM1_SIRAM_ENTRY_CSEL_SCC3; + case FSL_CPM_TSA_SCC4: return TSA_CPM1_SIRAM_ENTRY_CSEL_SCC4; + case FSL_CPM_TSA_SMC1: return TSA_CPM1_SIRAM_ENTRY_CSEL_SMC1; + case FSL_CPM_TSA_SMC2: return TSA_CPM1_SIRAM_ENTRY_CSEL_SMC2; default: break; } - return TSA_SIRAM_ENTRY_CSEL_NU; + return TSA_CPM1_SIRAM_ENTRY_CSEL_NU; } -static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area, - u32 count, u32 serial_id) +static int tsa_cpm1_add_entry(struct tsa *tsa, struct tsa_entries_area *area, + u32 count, u32 serial_id) { void __iomem *addr; u32 left; @@ -328,21 +339,21 @@ static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area, if (area->last_entry) { /* Clear last flag */ - tsa_clrbits32(area->last_entry, TSA_SIRAM_ENTRY_LAST); + tsa_clrbits32(area->last_entry, TSA_CPM1_SIRAM_ENTRY_LAST); } left = count; while (left) { - val = TSA_SIRAM_ENTRY_BYTE | tsa_serial_id2csel(tsa, serial_id); + val = TSA_CPM1_SIRAM_ENTRY_BYTE | tsa_cpm1_serial_id2csel(tsa, serial_id); if (left > 16) { cnt = 16; } else { cnt = left; - val |= TSA_SIRAM_ENTRY_LAST; + val |= TSA_CPM1_SIRAM_ENTRY_LAST; area->last_entry = addr; } - val |= TSA_SIRAM_ENTRY_CNT(cnt - 1); + val |= TSA_CPM1_SIRAM_ENTRY_CNT(cnt - 1); tsa_write32(addr, val); addr += 4; @@ -352,6 +363,12 @@ static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area, return 0; } +static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area, + u32 count, u32 serial_id) +{ + return tsa_cpm1_add_entry(tsa, area, count, serial_id); +} + static int tsa_of_parse_tdm_route(struct tsa *tsa, struct device_node *tdm_np, u32 tdms, u32 tdm_id, bool is_rx) { @@ -636,7 +653,7 @@ static void tsa_init_si_ram(struct tsa *tsa) /* Fill all entries as the last one */ for (i = 0; i < tsa->si_ram_sz; i += 4) - tsa_write32(tsa->si_ram + i, TSA_SIRAM_ENTRY_LAST); + tsa_write32(tsa->si_ram + i, TSA_CPM1_SIRAM_ENTRY_LAST); } static int tsa_probe(struct platform_device *pdev)