From patchwork Mon Jul 29 16:14:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 13745384 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CB95C3DA7E for ; Mon, 29 Jul 2024 16:19:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=eP7hNuQUMm53L8DEGKmQh+mExQx+1vMOlG4PtNmVVss=; b=Ywk0Pc/CPFi7NRXxQzEosd6JpL XFjTN0LouvTKPjJYXAWdiv0F2WyfEBINE6Mw+yEbBmo6gNQo02zaFTW6iaU1hufgLRtExBp5eaAqP t5eYgZUzTZMpk0193x1CpU+g8gu95fMa07fFqjG3aDwps3C3SPO7y+g80H7BO2JbtFVtEwgsNEjPX rtmBWwI3UfEB+4m6FgVyH0s/eoXgDxL1kXhgvVWYAWDDfmWbtnmMXACp3zGqIEXf8tnEugpU/0A6y moqQuhyzoC0756AgVjuWhl5T5jm/0HuZC8l5XWdirLl8lrT6VOKkTd77jFhrsFG60uoD652HQaIGC eb1bD2mg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYT5b-0000000BzCU-1Ov8; Mon, 29 Jul 2024 16:19:11 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYT1z-0000000ByMz-1Dx9 for linux-arm-kernel@lists.infradead.org; Mon, 29 Jul 2024 16:15:28 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24B86143D; Mon, 29 Jul 2024 09:15:52 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B06E63F766; Mon, 29 Jul 2024 09:15:25 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: akos.denke@arm.com, andre.przywara@arm.com, luca.fancellu@arm.com, mark.rutland@arm.com, maz@kernel.org Subject: [BOOT-WRAPPER 09/11] Simplify spin logic Date: Mon, 29 Jul 2024 17:14:59 +0100 Message-Id: <20240729161501.1806271-10-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240729161501.1806271-1-mark.rutland@arm.com> References: <20240729161501.1806271-1-mark.rutland@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240729_091527_507498_DB754727 X-CRM114-Status: GOOD ( 14.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The logic for initial boot is more complicated than it needs to be, with both first_spin() having a special case for CPU0 that requires an additional argument to be passed to spin(). Simplify this by moving the special-case logic for CPU0 into first_spin(). This removes the need to provide a dummy mailbox for CPU0 to spin on, simplfiies callers of first_spin() and spin(), which no longer need to pass a dummy mailbox or 'is_entry' for CPU0. Signed-off-by: Mark Rutland Cc: Akos Denke Cc: Andre Przywara Cc: Luca Fancellu Cc: Marc Zyngier --- arch/aarch64/spin.S | 11 +---------- common/boot.c | 20 ++++++++------------ common/psci.c | 2 +- include/boot.h | 2 +- 4 files changed, 11 insertions(+), 24 deletions(-) diff --git a/arch/aarch64/spin.S b/arch/aarch64/spin.S index 375f732..a7879d4 100644 --- a/arch/aarch64/spin.S +++ b/arch/aarch64/spin.S @@ -23,15 +23,6 @@ ASM_FUNC(start_bootmethod) * Primary CPU (x0 = 0) jumps to kernel, the other ones wait for an * address to appear in mbox */ - adr x3, mbox - adr x4, kernel_address - cmp x0, #0 - csel x1, x3, x4, ne + adr x1, mbox mov x2, #0 bl first_spin - - .align 3 -kernel_address: - .long 0 - - .ltorg diff --git a/common/boot.c b/common/boot.c index 29d53a4..4417649 100644 --- a/common/boot.c +++ b/common/boot.c @@ -27,7 +27,7 @@ const unsigned long id_table[] = { CPU_IDS }; * @invalid: value of an invalid address, 0 or -1 depending on the boot method * @is_entry: when true, pass boot parameters to the kernel, instead of 0 */ -void __noreturn spin(unsigned long *mbox, unsigned long invalid, int is_entry) +void __noreturn spin(unsigned long *mbox, unsigned long invalid) { unsigned long addr = invalid; @@ -36,13 +36,6 @@ void __noreturn spin(unsigned long *mbox, unsigned long invalid, int is_entry) addr = *mbox; } - if (is_entry) -#ifdef KERNEL_32 - jump_kernel(addr, 0, ~0, (unsigned long)&dtb, 0); -#else - jump_kernel(addr, (unsigned long)&dtb, 0, 0, 0); -#endif - jump_kernel(addr, 0, 0, 0, 0); unreachable(); @@ -60,12 +53,15 @@ void __noreturn first_spin(unsigned int cpu, unsigned long *mbox, unsigned long invalid) { if (cpu == 0) { - *mbox = (unsigned long)&entrypoint; - sevl(); - spin(mbox, invalid, 1); + unsigned long addr = (unsigned long)&entrypoint; +#ifdef KERNEL_32 + jump_kernel(addr, 0, ~0, (unsigned long)&dtb, 0); +#else + jump_kernel(addr, (unsigned long)&dtb, 0, 0, 0); +#endif } else { *mbox = invalid; - spin(mbox, invalid, 0); + spin(mbox, invalid); } unreachable(); diff --git a/common/psci.c b/common/psci.c index 5ae4255..19cc315 100644 --- a/common/psci.c +++ b/common/psci.c @@ -57,7 +57,7 @@ static int psci_cpu_off(void) branch_table[cpu] = PSCI_ADDR_INVALID; - spin(branch_table + cpu, PSCI_ADDR_INVALID, 0); + spin(branch_table + cpu, PSCI_ADDR_INVALID); unreachable(); } diff --git a/include/boot.h b/include/boot.h index 459d1d5..18b805d 100644 --- a/include/boot.h +++ b/include/boot.h @@ -12,7 +12,7 @@ #include #include -void __noreturn spin(unsigned long *mbox, unsigned long invalid, int is_entry); +void __noreturn spin(unsigned long *mbox, unsigned long invalid); void __noreturn first_spin(unsigned int cpu, unsigned long *mbox, unsigned long invalid_addr);