From patchwork Mon Jul 29 16:14:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 13745260 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 133E7C3DA61 for ; Mon, 29 Jul 2024 16:16:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=apfw54rnp4ri5sKGInijz4bMSlwUtQtGLjxNlDWrtMU=; b=3WbSlOI9K5iKIQVUsC2IHVtmAH 5bPVcmEybrAIzj6g1F70A9q+N8y3p62lN6/njmysB57zfyYrD0YQHa2HD1qJRmrU3jAEGPESk16NW SYJAmsSBWzy4ULpXnisuVkFCW9KmkNq39hj0sezn+Bz2nIodgD4bU5s8y4iTVkvtD7aT1EJ1BKcxq SuqUn4VoJu9/K3BN5kuwqFrbMQpt+KmWRlojfFm+CGQ14JMpHuLAHOyYt4dECUXGuXcbfEphkVlcM x8PXSp5OGs2YZxPm3IQYLl2Fb4skmXkoXWyAj1DuRGdvwUn5lktMFjouviH0CLHdkzMTGF3wV4VR8 RzQQ9YWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYT2X-0000000ByVA-34VH; Mon, 29 Jul 2024 16:16:01 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYT1l-0000000ByKT-47qh for linux-arm-kernel@lists.infradead.org; Mon, 29 Jul 2024 16:15:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7179E143D; Mon, 29 Jul 2024 09:15:37 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 08FD13F766; Mon, 29 Jul 2024 09:15:10 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: akos.denke@arm.com, andre.przywara@arm.com, luca.fancellu@arm.com, mark.rutland@arm.com, maz@kernel.org Subject: [BOOT-WRAPPER 01/11] Always enter AArch32 kernels in ARM mode Date: Mon, 29 Jul 2024 17:14:51 +0100 Message-Id: <20240729161501.1806271-2-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240729161501.1806271-1-mark.rutland@arm.com> References: <20240729161501.1806271-1-mark.rutland@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240729_091514_148699_1C8061D6 X-CRM114-Status: GOOD ( 13.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currnetly we try to support entering AArch32 kernels, but this is unnecessary, and the code is never exercised. Per Linux's Documentation/arch/arm/booting.txt, AArch32 kernels supported by the AArch64 boot-wrapper should always be entered in ARM mode: | The boot loader is expected to call the kernel image by jumping | directly to the first instruction of the kernel image. | | On CPUs supporting the ARM instruction set, the entry must be | made in ARM state, even for a Thumb-2 kernel. | | On CPUs supporting only the Thumb instruction set such as | Cortex-M class CPUs, the entry must be made in Thumb state. Additionally, the kernel__start symbol that we use as the kernel entrypoint is always PHYS_OFFSET + KERNEL_OFFSET, which doesn't take into account any ARM/Thumb distinction in the AArch32 kernel image, and hence we'll never try to set the Thumb bit in the SPSR. Remove the redundant code. Signed-off-by: Mark Rutland Cc: Akos Denke Cc: Andre Przywara Cc: Luca Fancellu Cc: Marc Zyngier --- arch/aarch32/boot.S | 4 ---- arch/aarch64/boot.S | 7 ------- 2 files changed, 11 deletions(-) diff --git a/arch/aarch32/boot.S b/arch/aarch32/boot.S index 4d16c9c..5c2a183 100644 --- a/arch/aarch32/boot.S +++ b/arch/aarch32/boot.S @@ -105,10 +105,6 @@ ASM_FUNC(jump_kernel) bxeq lr @ no EL3 ldr r4, =SPSR_KERNEL - /* Return in thumb2 mode when bit 0 of address is 1 */ - tst lr, #1 - orrne r4, #PSR_T - msr spsr_cxf, r4 movs pc, lr diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index da5fa65..b889137 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -136,13 +136,6 @@ ASM_FUNC(jump_kernel) br x19 // No EL3 1: mov x4, #SPSR_KERNEL - - /* - * If bit 0 of the kernel address is set, we're entering in AArch32 - * thumb mode. Set SPSR.T accordingly. - */ - bfi x4, x19, #5, #1 - msr elr_el3, x19 msr spsr_el3, x4 eret