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bh=6eHddPVGPNGu45tjA8N1T/anIVe7WOGhBOGi7XxkJdc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=XmrITfTnfROV+LelKGCXviuRkwwL6L0i2KBYhV3T/sZ+voMjCh8buRzuRVjpw+9ym HbVYdjlaC1lFfmNcdxiAzOzCVTGRJgmgHSToj4ZheeOfiQ242/wSCdj8YrjTyQoouU DlbZ5vYgjtIIuR9FK1HvtFf300ncb+6+KOO5zFLTe4e8ukBZ+D1epSvEkI0oy93C28 9zfRPWEiIapepUF8X8+5j3W+olFCEFhfUA3hhztJ125xF0hbDW81+nys2oQkX8IMvm VT8V9ltN5hMKaqYsSHSePKKFqPvwJgPDZrcQPehG+nnT2RNdH6Ll//Gcjg0b7knQZT WhSIwg0xz5NmA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 264A1C52D1D; Tue, 30 Jul 2024 10:26:11 +0000 (UTC) From: =?utf-8?q?Duje_Mihanovi=C4=87_via_B4_Relay?= Date: Tue, 30 Jul 2024 12:25:14 +0200 Subject: [PATCH v11 06/12] clk: mmp: Add Marvell PXA1908 APBCP driver MIME-Version: 1.0 Message-Id: <20240730-pxa1908-lkml-v11-6-21dbb3e28793@skole.hr> References: <20240730-pxa1908-lkml-v11-0-21dbb3e28793@skole.hr> In-Reply-To: <20240730-pxa1908-lkml-v11-0-21dbb3e28793@skole.hr> To: Michael Turquette , Stephen Boyd , Linus Walleij , Rob Herring , Conor Dooley , Tony Lindgren , Haojian Zhuang , =?utf-8?q?Duje_Mihanovi=C4=87?= , Lubomir Rintel , Catalin Marinas , Will Deacon , Rob Herring , Krzysztof Kozlowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Karel Balej , David Wronek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3684; i=duje.mihanovic@skole.hr; s=20240706; h=from:subject:message-id; bh=USsJLoGDJXHCWdJAW+Lle+IllTO8RpuR/kOtJOEgQTM=; b=owGbwMvMwCW21nBykGv/WmbG02pJDGkr9m9h8uD9sfqcJFdzQe3yXjarmf2h7272Tm2pO3zjQ s/Un9t3d5SyMIhxMciKKbLk/ne8xvtZZOv27GUGMHNYmUCGMHBxCsBENp5k+O9oUndwzvT71Ws2 Li3QvsgunxRQvztCtmKO8m7nJS5btWQYGa5dD8s7kNr3N+jTFA6tR/UF/Nfmcr+N7hGYmlYk9f5 wITcA X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=6DFF41D60DF314B5B76BA630AD319352458FAD03 X-Endpoint-Received: by B4 Relay for duje.mihanovic@skole.hr/20240706 with auth_id=191 X-Original-From: =?utf-8?q?Duje_Mihanovi=C4=87?= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240730_112626_265915_7B2A7D84 X-CRM114-Status: GOOD ( 17.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: duje.mihanovic@skole.hr Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Duje Mihanović Add driver for the APBCP controller block found on Marvell's PXA1908 SoC. Signed-off-by: Duje Mihanović --- drivers/clk/mmp/Makefile | 2 +- drivers/clk/mmp/clk-pxa1908-apbcp.c | 84 +++++++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mmp/Makefile b/drivers/clk/mmp/Makefile index 685bb80f8ae1..038bcd4d035e 100644 --- a/drivers/clk/mmp/Makefile +++ b/drivers/clk/mmp/Makefile @@ -11,4 +11,4 @@ obj-$(CONFIG_MACH_MMP_DT) += clk-of-pxa168.o clk-of-pxa910.o obj-$(CONFIG_COMMON_CLK_MMP2) += clk-of-mmp2.o clk-pll.o pwr-island.o obj-$(CONFIG_COMMON_CLK_MMP2_AUDIO) += clk-audio.o -obj-$(CONFIG_ARCH_MMP) += clk-of-pxa1928.o clk-pxa1908-apbc.o +obj-$(CONFIG_ARCH_MMP) += clk-of-pxa1928.o clk-pxa1908-apbc.o clk-pxa1908-apbcp.o diff --git a/drivers/clk/mmp/clk-pxa1908-apbcp.c b/drivers/clk/mmp/clk-pxa1908-apbcp.c new file mode 100644 index 000000000000..2a53cf276407 --- /dev/null +++ b/drivers/clk/mmp/clk-pxa1908-apbcp.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include +#include + +#include + +#include "clk.h" + +#define APBCP_UART2 0x1c +#define APBCP_TWSI2 0x28 +#define APBCP_AICER 0x38 + +#define APBCP_NR_CLKS 4 + +struct pxa1908_clk_unit { + struct mmp_clk_unit unit; + void __iomem *base; +}; + +static DEFINE_SPINLOCK(uart2_lock); + +static const char * const uart_parent_names[] = {"pll1_117", "uart_pll"}; + +static struct mmp_param_gate_clk apbcp_gate_clks[] = { + {PXA1908_CLK_UART2, "uart2_clk", "uart2_mux", CLK_SET_RATE_PARENT, APBCP_UART2, 0x7, 0x3, 0x0, 0, &uart2_lock}, + {PXA1908_CLK_TWSI2, "twsi2_clk", "pll1_32", CLK_SET_RATE_PARENT, APBCP_TWSI2, 0x7, 0x3, 0x0, 0, NULL}, + {PXA1908_CLK_AICER, "ripc_clk", NULL, 0, APBCP_AICER, 0x7, 0x2, 0x0, 0, NULL}, +}; + +static struct mmp_param_mux_clk apbcp_mux_clks[] = { + {0, "uart2_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBCP_UART2, 4, 3, 0, &uart2_lock}, +}; + +static void pxa1908_apb_p_periph_clk_init(struct pxa1908_clk_unit *pxa_unit) +{ + struct mmp_clk_unit *unit = &pxa_unit->unit; + + mmp_register_mux_clks(unit, apbcp_mux_clks, pxa_unit->base, + ARRAY_SIZE(apbcp_mux_clks)); + mmp_register_gate_clks(unit, apbcp_gate_clks, pxa_unit->base, + ARRAY_SIZE(apbcp_gate_clks)); +} + +static int pxa1908_apbcp_probe(struct platform_device *pdev) +{ + struct pxa1908_clk_unit *pxa_unit; + + pxa_unit = devm_kzalloc(&pdev->dev, sizeof(*pxa_unit), GFP_KERNEL); + if (IS_ERR(pxa_unit)) + return PTR_ERR(pxa_unit); + + pxa_unit->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(pxa_unit->base)) + return PTR_ERR(pxa_unit->base); + + mmp_clk_init(pdev->dev.of_node, &pxa_unit->unit, APBCP_NR_CLKS); + + pxa1908_apb_p_periph_clk_init(pxa_unit); + + return 0; +} + +static const struct of_device_id pxa1908_apbcp_match_table[] = { + { .compatible = "marvell,pxa1908-apbcp" }, + { } +}; +MODULE_DEVICE_TABLE(of, pxa1908_apbcp_match_table); + +static struct platform_driver pxa1908_apbcp_driver = { + .probe = pxa1908_apbcp_probe, + .driver = { + .name = "pxa1908-apbcp", + .of_match_table = pxa1908_apbcp_match_table + } +}; +module_platform_driver(pxa1908_apbcp_driver); + +MODULE_AUTHOR("Duje Mihanović "); +MODULE_DESCRIPTION("Marvell PXA1908 APBCP Clock Driver"); +MODULE_LICENSE("GPL");