From patchwork Wed Jul 31 17:10:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manorit Chawdhry X-Patchwork-Id: 13748999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D66CEC3DA64 for ; Wed, 31 Jul 2024 17:15:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=m8yE4PnEM9kCNwvR96U6Zj1VFy8LOKMPDIbWtSVfzE4=; b=KyCgntyjfIS3xQe+AhlXI7BZ78 SJq1m3rY5XXohoFOUZilR07iclGTt8CSJYibzjzLWOVZHbJZG2n5BrCOBk0xFuT7DX9U8l4V9FJxq BMTVraYQypyeNFM1VEEvgT00FQADBYo7XdwoJGQQVwvxW/VTdYeGhdYwWNLU5zDq7S7Bfy0E8uMxi ZFKk4NhqKHfvfr82dmH9FNWQUC2+RFhUrib2XbmMA0ir1JxIntemf30mwBHcKczplUlCovPhYCnrX 40cW8qs+7vNUo5Rlz6KMNW5E/bOq92pje4vg9zWA6R41heN2Rk9UexlnIdIP76fPir8ty6TUCFWsb fi9ENNXg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZCv7-00000001zgj-13gE; Wed, 31 Jul 2024 17:15:25 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZCr2-00000001yU0-45lW for linux-arm-kernel@lists.infradead.org; Wed, 31 Jul 2024 17:11:14 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 46VHB9l3117367; Wed, 31 Jul 2024 12:11:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1722445869; bh=m8yE4PnEM9kCNwvR96U6Zj1VFy8LOKMPDIbWtSVfzE4=; h=From:Date:Subject:References:In-Reply-To:To:CC; b=jViwoHkMf7BhDByqtGuxiueikGLsGl1rKo5oIhHK5eyv6A4SnnqXqbTnmy6eVdXLg ZdkEOHFmxW9LbOiYZnctkK6Mxd4p+th3D5bwGyZZvR2Z3A/4bP4dWZr9r8lm+VCrMv wxAp7t4yLBi0+uKSZPJnxRdFlQdXvcbc6Og96/hQ= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 46VHB9Gl109252 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 31 Jul 2024 12:11:09 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 31 Jul 2024 12:11:09 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 31 Jul 2024 12:11:09 -0500 Received: from [127.0.1.1] (uda0497581.dhcp.ti.com [10.24.68.185]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 46VHAVgW036362; Wed, 31 Jul 2024 12:11:06 -0500 From: Manorit Chawdhry Date: Wed, 31 Jul 2024 22:40:35 +0530 Subject: [PATCH v3 9/9] arm64: dts: ti: Add support for J742S2 EVM board MIME-Version: 1.0 Message-ID: <20240731-b4-upstream-j742s2-v3-9-da7fe3aa9e90@ti.com> References: <20240731-b4-upstream-j742s2-v3-0-da7fe3aa9e90@ti.com> In-Reply-To: <20240731-b4-upstream-j742s2-v3-0-da7fe3aa9e90@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Udit Kumar , Neha Malcom Francis , Aniket Limaye , Manorit Chawdhry X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1722445831; l=3518; i=m-chawdhry@ti.com; s=20231127; h=from:subject:message-id; bh=bLKIStg32CKaj6+VtwdHIZvNTmLrFgAVJyIBzHe+KWc=; b=ihjIAZX8EBLlNu8Yw2LQskvPqfR4ghVf2LcNY2eyB3HR/dRzUDpo5AIAp0Orv4gmPc/iHTjfr NmXYKk1G3X8BUmZTOiCeTOyiHWoPBXKsI7v6WbDc20fCvXle/+zcm5n X-Developer-Key: i=m-chawdhry@ti.com; a=ed25519; pk=fsr6Tm39TvsTgfyfFQLk+nnqIz2sBA1PthfqqfiiYSs= X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240731_101113_182866_EB9448E8 X-CRM114-Status: GOOD ( 14.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org J742S2 EVM board is designed for TI J742S2 SoC. It supports the following interfaces: * 16 GB DDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode * x1 Input Audio Jack, x1 Output Audio Jack * x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port * x1 4L PCIe connector * x1 UHS-1 capable micro-SD card slot * 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash, UFS flash. * x6 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * x1 GESI expander, x2 Display connector * x1 15-pin CSI header * x6 MCAN instances Link: https://www.ti.com/lit/ug/sprujd8/sprujd8.pdf (EVM user guide) Link: https://www.ti.com/lit/zip/SPAC001 (Schematics) Signed-off-by: Manorit Chawdhry Reviewed-By: Beleswar Padhi --- arch/arm64/boot/dts/ti/Makefile | 4 ++++ arch/arm64/boot/dts/ti/k3-j742s2-evm.dts | 26 ++++++++++++++++++++++ .../boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 3 ++- 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index e20b27ddf901..1bf645726a10 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -119,6 +119,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-pcie0-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo +# Boards with J742S2 SoC +dtb-$(CONFIG_ARCH_K3) += k3-j742s2-evm.dtb + # Build time test only, enabled by CONFIG_OF_ALL_DTBS k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \ k3-am625-beagleplay-csi2-ov5640.dtbo @@ -240,3 +243,4 @@ DTC_FLAGS_k3-j721e-common-proc-board += -@ DTC_FLAGS_k3-j721e-sk += -@ DTC_FLAGS_k3-j721s2-common-proc-board += -@ DTC_FLAGS_k3-j784s4-evm += -@ +DTC_FLAGS_k3-j742s2-evm += -@ diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts new file mode 100644 index 000000000000..ac683bcbfe97 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + * + * EVM Board Schematics: https://www.ti.com/lit/zip/SPAC001 + */ + +/dts-v1/; + +#include +#include +#include "k3-j742s2.dtsi" +#include "k3-j784s4-j742s2-evm-common.dtsi" + +/ { + model = "Texas Instruments J742S2 EVM"; + compatible = "ti,j742s2-evm", "ti,j742s2"; + + memory@80000000 { + device_type = "memory"; + bootph-all; + /* 16G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>, + <0x00000008 0x80000000 0x00000003 0x80000000>; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi index 068ceed4ea15..a7bb1857b4e8 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi @@ -2,7 +2,8 @@ /* * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ * - * EVM Board Schematics: https://www.ti.com/lit/zip/sprr458 + * EVM Board Schematics(j784s4): https://www.ti.com/lit/zip/sprr458 + * EVM Board Schematics(j742s2): https://www.ti.com/lit/zip/SPAC001 */ / { chosen {