From patchwork Wed Jul 31 19:40:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 13749143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CF4CC3DA64 for ; Wed, 31 Jul 2024 19:48:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=wK23K92tavlcZEyxp1UkkjFE9vQO85ymMxabZ7m0S60=; b=dbpPqnrrpXnNo4Ls6cH8d739h8 EWT0rHPial6SQZUQniOoZBEbgjwQNON0gfij2UcumAaGaAW/rRrVoAPOb1rkXqxy2PoB2lKtxWKD9 dKACyvN7kBCXu+omMjs0QqrjSaGM/DOJV4O2dkw4MwnovkRjTBo2aE+hIFSrAAkpXrIXKpd01tOEP knGw1oOIOkzDyY2WoIGEW1mCIXXe/qZu8623bTNYI7iO+HCAQ3UqTseUhlQZfCEebLQXPTiGQxaWa r5XunzZnLinicR1xqDV6RZvMzqNrgQ9KiDiPTg8Pzb7cdBWtf3oG1nTLgIVu7yasIHPv9Kmw6gvJs Dy0scssg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZFId-00000002Lsz-0i3P; Wed, 31 Jul 2024 19:47:51 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZFBz-00000002Jhq-0TiC for linux-arm-kernel@lists.infradead.org; Wed, 31 Jul 2024 19:41:02 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 5DE49CE180E; Wed, 31 Jul 2024 19:40:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 094DAC4AF10; Wed, 31 Jul 2024 19:40:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722454857; bh=EF8aKuuoQKZ+bIKTimqLMEUEDhCJhIZkBeFL7Woj37A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FA/F7pPPOPc+klI0VA4ovgrwwNeKA3n6IPOd27+FrTMUyavjz1oA21nPxKzmHlV9l VYtOgVPkY/NEgyCqDpgl+SxMKQbXkdUU/5RV7F5LDZwDVfnYWTb3Bfm6G0H5bLvwZz njmVZoPRP3fpNWSUphtsyJa8xRZZJBeOT8/p4aWuCKDBfwdrahT8uBOtXq5KLMKjEW RPz5BEvBKMAJ19RF/Hoowd451xDepl/W7ZxDjjROPb1Dg3Op4u1dN9zqn9SwiXelhE IA+pgVrvm9n92UJQZggiVLlcwcb2ft5LXnR333CBN7ltgo2Ox5JzR3iawv7kB/CIeL KH5+yRclfPLRA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sZFBv-00H6Gh-2g; Wed, 31 Jul 2024 20:40:55 +0100 From: Marc Zyngier To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org Cc: James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Joey Gouly , Alexandru Elisei , Anshuman Khandual , Przemyslaw Gaj Subject: [PATCH v2 10/17] KVM: arm64: nv: Add basic emulation of AT S1E2{R,W} Date: Wed, 31 Jul 2024 20:40:23 +0100 Message-Id: <20240731194030.1991237-11-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240731194030.1991237-1-maz@kernel.org> References: <20240731194030.1991237-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, joey.gouly@arm.com, alexandru.elisei@arm.com, anshuman.khandual@arm.com, pgaj@cadence.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240731_124059_665889_798836D5 X-CRM114-Status: GOOD ( 12.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Similar to our AT S1E{0,1} emulation, we implement the AT S1E2 handling. This emulation of course suffers from the same problems, but is somehow simpler due to the lack of PAN2 and the fact that we are guaranteed to execute it from the correct context. Co-developed-by: Jintack Lim Signed-off-by: Jintack Lim Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/kvm_asm.h | 1 + arch/arm64/kvm/at.c | 51 ++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h index 9b6c9f4f4d88..6ec062296976 100644 --- a/arch/arm64/include/asm/kvm_asm.h +++ b/arch/arm64/include/asm/kvm_asm.h @@ -237,6 +237,7 @@ extern int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding); extern void __kvm_timer_set_cntvoff(u64 cntvoff); extern void __kvm_at_s1e01(struct kvm_vcpu *vcpu, u32 op, u64 vaddr); +extern void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr); extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu); diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c index 92df948350e1..34736c1fe398 100644 --- a/arch/arm64/kvm/at.c +++ b/arch/arm64/kvm/at.c @@ -164,3 +164,54 @@ void __kvm_at_s1e01(struct kvm_vcpu *vcpu, u32 op, u64 vaddr) vcpu_write_sys_reg(vcpu, par, PAR_EL1); } + +void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr) +{ + u64 par; + + /* + * We've trapped, so everything is live on the CPU. As we will be + * switching context behind everybody's back, disable interrupts... + */ + scoped_guard(write_lock_irqsave, &vcpu->kvm->mmu_lock) { + struct kvm_s2_mmu *mmu; + u64 val, hcr; + bool fail; + + mmu = &vcpu->kvm->arch.mmu; + + val = hcr = read_sysreg(hcr_el2); + val &= ~HCR_TGE; + val |= HCR_VM; + + if (!vcpu_el2_e2h_is_set(vcpu)) + val |= HCR_NV | HCR_NV1; + + write_sysreg(val, hcr_el2); + isb(); + + par = SYS_PAR_EL1_F; + + switch (op) { + case OP_AT_S1E2R: + fail = __kvm_at(OP_AT_S1E1R, vaddr); + break; + case OP_AT_S1E2W: + fail = __kvm_at(OP_AT_S1E1W, vaddr); + break; + default: + WARN_ON_ONCE(1); + fail = true; + } + + isb(); + + if (!fail) + par = read_sysreg_par(); + + write_sysreg(hcr, hcr_el2); + isb(); + } + + vcpu_write_sys_reg(vcpu, par, PAR_EL1); +}