| Message ID | 20240801081144.22372-1-shuijing.li@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4] drm/mediatek: dsi: Add dsi per-frame lp code for mt8188 | expand |
Il 01/08/24 10:11, Shuijing Li ha scritto: > Adding the per-frame lp function of mt8188, which can keep HFP in HS and > reduce the time required for each line to enter and exit low power. > Per Frame LP: > |<----------One Active Frame-------->| > --______________________________________----___________________ > ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^ ^HSA+HBP^^RGB^^HFP^ > > Per Line LP: > |<---------------One Active Frame----------->| > --______________--______________--______________----______________ > ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > --- > Changes in v4: > Drop the code related to bllp_en and bllp_wc, adjust ps_wc to dsi->vm.hactive * > dsi_buf_bpp. > Changes in v3: > Use function in bitfield.h and get value from phy timing, per suggestion > from previous thread: > https://patchwork.kernel.org/project/linux-mediatek/patch/20240424091639.22759-1-shuijing.li@mediatek.com/ > Changes in v2: > Use bitfield macros and add new function for per prame lp and improve > the format, per suggestion from previous thread: > https://patchwork.kernel.org/project/linux-mediatek/patch/20240314094238.3315-1-shuijing.li@mediatek.com/ > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 210 ++++++++++++++++++++++------- > 1 file changed, 163 insertions(+), 47 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index b6e3c011a12d..4bda8fa17c3d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -88,12 +88,16 @@ > #define DSI_HSA_WC 0x50 > #define DSI_HBP_WC 0x54 > #define DSI_HFP_WC 0x58 > +#define HFP_HS_EN 31 #define HFP_HS_VB_PS_WC GENMASK(30, 16) #define HFP_HS_EN BIT(31) > +#define HFP_HS_VB_PS_WC_SHIFT 16 ...you don't need this definition > > #define DSI_CMDQ_SIZE 0x60 > #define CMDQ_SIZE 0x3f > #define CMDQ_SIZE_SEL BIT(15) > > #define DSI_HSTX_CKL_WC 0x64 > +#define HSTX_CKL_WC GENMASK(15, 2) > +#define HSTX_CKL_WC_SHIFT 2 This one is already defined in your GENMASK(...), and you should avoid having to define that at all. Check below for a solution. > > #define DSI_RX_DATA0 0x74 > #define DSI_RX_DATA1 0x78 > @@ -187,6 +191,7 @@ struct mtk_dsi_driver_data { > bool has_shadow_ctl; > bool has_size_ctl; > bool cmdq_long_packet_ctl; > + bool support_per_frame_lp; > }; > > struct mtk_dsi { > @@ -426,6 +431,112 @@ static void mtk_dsi_ps_control(struct mtk_dsi *dsi, bool config_vact) > writel(ps_val, dsi->regs + DSI_PSCTRL); > } > > +static void mtk_dsi_config_vdo_timing_per_frame_lp(struct mtk_dsi *dsi) > +{ > + u32 horizontal_sync_active_byte; > + u32 horizontal_backporch_byte; > + u32 horizontal_frontporch_byte; > + u32 dsi_tmp_buf_bpp; > + unsigned int lpx, da_hs_exit, da_hs_prep, da_hs_trail; > + unsigned int da_hs_zero, ps_wc, hs_vb_ps_wc; > + u32 v_active_roundup, hstx_cklp_wc; > + u32 hstx_cklp_wc_max, hstx_cklp_wc_min; > + struct videomode *vm = &dsi->vm; > + > + if (dsi->format == MIPI_DSI_FMT_RGB565) > + dsi_tmp_buf_bpp = 2; > + else > + dsi_tmp_buf_bpp = 3; > + > + da_hs_trail = dsi->phy_timing.da_hs_trail; > + ps_wc = dsi->vm.hactive * dsi_tmp_buf_bpp; > + > + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { > + horizontal_sync_active_byte = > + vm->hsync_len * dsi_tmp_buf_bpp - 10; > + horizontal_backporch_byte = > + vm->hback_porch * dsi_tmp_buf_bpp - 10; > + horizontal_frontporch_byte = > + vm->hfront_porch * dsi_tmp_buf_bpp - 12; > + > + v_active_roundup = (32 + horizontal_sync_active_byte + > + horizontal_backporch_byte + ps_wc + > + horizontal_frontporch_byte) % dsi->lanes; > + if (v_active_roundup) > + horizontal_backporch_byte = horizontal_backporch_byte + > + dsi->lanes - v_active_roundup; > + hstx_cklp_wc_min = (DIV_ROUND_UP((12 + 2 + 4 + > + horizontal_sync_active_byte), dsi->lanes) + da_hs_trail + 1) > + * dsi->lanes / 6 - 1; > + hstx_cklp_wc_max = (DIV_ROUND_UP((20 + 6 + 4 + > + horizontal_sync_active_byte + horizontal_backporch_byte + > + ps_wc), dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; > + } else { > + horizontal_sync_active_byte = vm->hsync_len * dsi_tmp_buf_bpp - 4; > + > + horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * > + dsi_tmp_buf_bpp - 10; > + hstx_cklp_wc_min = (DIV_ROUND_UP(4, dsi->lanes) + da_hs_trail + 1) > + * dsi->lanes / 6 - 1; > + > + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { > + horizontal_frontporch_byte = (vm->hfront_porch * > + dsi_tmp_buf_bpp - 18); > + > + v_active_roundup = (28 + horizontal_backporch_byte + ps_wc + > + horizontal_frontporch_byte) % dsi->lanes; > + if (v_active_roundup) > + horizontal_backporch_byte = horizontal_backporch_byte + > + dsi->lanes - v_active_roundup; > + > + hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 + > + horizontal_backporch_byte + ps_wc), > + dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; > + } else { > + horizontal_frontporch_byte = (vm->hfront_porch * > + dsi_tmp_buf_bpp - 12); > + > + v_active_roundup = (22 + horizontal_backporch_byte + ps_wc + > + horizontal_frontporch_byte) % dsi->lanes; > + if (v_active_roundup) > + horizontal_backporch_byte = horizontal_backporch_byte + > + dsi->lanes - v_active_roundup; > + > + hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 + > + horizontal_backporch_byte + ps_wc), > + dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; > + } > + } > + hstx_cklp_wc = FIELD_GET(HSTX_CKL_WC, readl(dsi->regs + DSI_HSTX_CKL_WC)); > + Sorry, this snippet is ugly. > + if (hstx_cklp_wc <= hstx_cklp_wc_min || > + hstx_cklp_wc >= hstx_cklp_wc_max) { > + hstx_cklp_wc = ((hstx_cklp_wc_min + hstx_cklp_wc_max) / 2) << HSTX_CKL_WC_SHIFT; > + writel(hstx_cklp_wc, dsi->regs + DSI_HSTX_CKL_WC); > + } > + hstx_cklp_wc = hstx_cklp_wc >> HSTX_CKL_WC_SHIFT; > + if (hstx_cklp_wc <= hstx_cklp_wc_min || > + hstx_cklp_wc >= hstx_cklp_wc_max) { > + DRM_WARN("Wrong setting of hstx_ckl_wc\n"); > + } ......... I can propose the following: if (hstx_cklp_wc <= hstx_cklp_wc_min || hstx_cklp_wc >= hstx_cklp_wc_max) { hstx_cklp_wc = ((hstx_cklp_wc_min + hstx_cklp_wc_max) / 2); /* Check if the new setting is valid */ if (hstx_cklp_wc <= hstx_cklp_wc_min || hstx_cklp_wc >= hstx_cklp_wc_max) DRM_WARN("Wrong setting of hstx_ckl_wc\n"); hstx_cklp_wc = FIELD_PREP(DSI_HSTX_CKL_WC, hstx_cklp_wc); writel(hstx_cklp_wc, dsi->regs + DSI_HSTX_CKL_WC); } .... and please remove the definition of HSTX_CKL_WC_SHIFT, as that is unused now. > + > + lpx = dsi->phy_timing.lpx; > + da_hs_exit = dsi->phy_timing.da_hs_exit; > + da_hs_prep = dsi->phy_timing.da_hs_prepare; > + da_hs_zero = dsi->phy_timing.da_hs_zero; > + > + hs_vb_ps_wc = ps_wc - > + (lpx + da_hs_exit + da_hs_prep + da_hs_zero + 2) > + * dsi->lanes; > + horizontal_frontporch_byte = (1 << HFP_HS_EN) > + | (hs_vb_ps_wc << HFP_HS_VB_PS_WC_SHIFT) > + | (horizontal_frontporch_byte); horizontal_frontporch_byte = FIELD_PREP(HFP_HS_EN, 1) | FIELD_PREP(HFP_HS_VB_PS_WC, hs_vb_ps_wc) | horizontal_frontporch_byte; > + > + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > + writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > + writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > +} > + > static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > { > u32 horizontal_sync_active_byte; > @@ -449,57 +560,61 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); > writel(vm->vactive, dsi->regs + DSI_VACT_NL); > > - if (dsi->driver_data->has_size_ctl) > - writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) | > - FIELD_PREP(DSI_WIDTH, vm->hactive), > - dsi->regs + DSI_SIZE_CON); > - > - horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); > - > - if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) > - horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10; > - else > - horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * > - dsi_tmp_buf_bpp - 10; > - > - data_phy_cycles = timing->lpx + timing->da_hs_prepare + > - timing->da_hs_zero + timing->da_hs_exit + 3; > - > - delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; > - delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; > + if (dsi->driver_data->support_per_frame_lp) There's a code style issue. If you need braces for the else, you need to add braces everywhere: if (dsi->driver_data->support_per_frame_lp) { mtk_dsi_config_vdo_timing_per_frame_lp(dsi); } else { ...... Regards, Angelo
Hi, Shuijing: On Thu, 2024-08-01 at 16:11 +0800, Shuijing Li wrote: > Adding the per-frame lp function of mt8188, which can keep HFP in HS and > reduce the time required for each line to enter and exit low power. > Per Frame LP: > |<----------One Active Frame-------->| > --______________________________________----___________________ > ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^ ^HSA+HBP^^RGB^^HFP^ > > Per Line LP: > |<---------------One Active Frame----------->| > --______________--______________--______________----______________ > ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > --- [snip] > + > static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > { > u32 horizontal_sync_active_byte; > @@ -449,57 +560,61 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); > writel(vm->vactive, dsi->regs + DSI_VACT_NL); > > - if (dsi->driver_data->has_size_ctl) > - writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) | > - FIELD_PREP(DSI_WIDTH, vm->hactive), > - dsi->regs + DSI_SIZE_CON); If support_per_frame_lp is true, this code would not be execute, but has_size_ctl is true in mt8188. Does this mean when support_per_frame_lp is true, has_size_ctl should be false? Regards, CK > - > - horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); > - > - if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) > - horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10; > - else > - horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * > - dsi_tmp_buf_bpp - 10; > - > - data_phy_cycles = timing->lpx + timing->da_hs_prepare + > - timing->da_hs_zero + timing->da_hs_exit + 3; > - > - delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; > - delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; > + if (dsi->driver_data->support_per_frame_lp) > + mtk_dsi_config_vdo_timing_per_frame_lp(dsi); > + else { > + if (dsi->driver_data->has_size_ctl) > + writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) | > + FIELD_PREP(DSI_WIDTH, vm->hactive), > + dsi->regs + DSI_SIZE_CON); > > - horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; > - horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte; > - data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta; > + horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); > > - if (horizontal_front_back_byte > data_phy_cycles_byte) { > - horizontal_frontporch_byte -= data_phy_cycles_byte * > - horizontal_frontporch_byte / > - horizontal_front_back_byte; > - > - horizontal_backporch_byte -= data_phy_cycles_byte * > - horizontal_backporch_byte / > - horizontal_front_back_byte; > - } else { > - DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > - } > - > - if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) && > - (dsi->lanes == 4)) { > - horizontal_sync_active_byte = > - roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > - horizontal_frontporch_byte = > - roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > - horizontal_backporch_byte = > - roundup(horizontal_backporch_byte, dsi->lanes) - 2; > - horizontal_backporch_byte -= > - (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) > + horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10; > + else > + horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * > + dsi_tmp_buf_bpp - 10; > + > + data_phy_cycles = timing->lpx + timing->da_hs_prepare + > + timing->da_hs_zero + timing->da_hs_exit + 3; > + > + delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; > + delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; > + > + horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; > + horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte; > + data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta; > + > + if (horizontal_front_back_byte > data_phy_cycles_byte) { > + horizontal_frontporch_byte -= data_phy_cycles_byte * > + horizontal_frontporch_byte / > + horizontal_front_back_byte; > + > + horizontal_backporch_byte -= data_phy_cycles_byte * > + horizontal_backporch_byte / > + horizontal_front_back_byte; > + } else { > + DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > + } > + > + if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) && > + (dsi->lanes == 4)) { > + horizontal_sync_active_byte = > + roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > + horizontal_frontporch_byte = > + roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte = > + roundup(horizontal_backporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte -= > + (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + } > + > + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > + writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > + writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > } > > - writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > - writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > - writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > - > mtk_dsi_ps_control(dsi, false); > } > > @@ -1197,6 +1312,7 @@ static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = { > .has_shadow_ctl = true, > .has_size_ctl = true, > .cmdq_long_packet_ctl = true, > + .support_per_frame_lp = true, > }; >
Hi, Shuijing: On Thu, 2024-08-01 at 16:11 +0800, Shuijing Li wrote: > Adding the per-frame lp function of mt8188, which can keep HFP in HS and > reduce the time required for each line to enter and exit low power. > Per Frame LP: > |<----------One Active Frame-------->| > --______________________________________----___________________ > ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^ ^HSA+HBP^^RGB^^HFP^ > > Per Line LP: > |<---------------One Active Frame----------->| > --______________--______________--______________----______________ > ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > --- [snip] > > +static void mtk_dsi_config_vdo_timing_per_frame_lp(struct mtk_dsi *dsi) > +{ > + u32 horizontal_sync_active_byte; > + u32 horizontal_backporch_byte; > + u32 horizontal_frontporch_byte; > + u32 dsi_tmp_buf_bpp; > + unsigned int lpx, da_hs_exit, da_hs_prep, da_hs_trail; > + unsigned int da_hs_zero, ps_wc, hs_vb_ps_wc; > + u32 v_active_roundup, hstx_cklp_wc; > + u32 hstx_cklp_wc_max, hstx_cklp_wc_min; > + struct videomode *vm = &dsi->vm; > + > + if (dsi->format == MIPI_DSI_FMT_RGB565) > + dsi_tmp_buf_bpp = 2; > + else > + dsi_tmp_buf_bpp = 3; > + > + da_hs_trail = dsi->phy_timing.da_hs_trail; > + ps_wc = dsi->vm.hactive * dsi_tmp_buf_bpp; > + > + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { > + horizontal_sync_active_byte = > + vm->hsync_len * dsi_tmp_buf_bpp - 10; > + horizontal_backporch_byte = > + vm->hback_porch * dsi_tmp_buf_bpp - 10; > + horizontal_frontporch_byte = > + vm->hfront_porch * dsi_tmp_buf_bpp - 12; > + > + v_active_roundup = (32 + horizontal_sync_active_byte + > + horizontal_backporch_byte + ps_wc + > + horizontal_frontporch_byte) % dsi->lanes; > + if (v_active_roundup) > + horizontal_backporch_byte = horizontal_backporch_byte + > + dsi->lanes - v_active_roundup; > + hstx_cklp_wc_min = (DIV_ROUND_UP((12 + 2 + 4 + > + horizontal_sync_active_byte), dsi->lanes) + da_hs_trail + 1) > + * dsi->lanes / 6 - 1; > + hstx_cklp_wc_max = (DIV_ROUND_UP((20 + 6 + 4 + > + horizontal_sync_active_byte + horizontal_backporch_byte + > + ps_wc), dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; > + } else { > + horizontal_sync_active_byte = vm->hsync_len * dsi_tmp_buf_bpp - 4; > + > + horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * > + dsi_tmp_buf_bpp - 10; > + hstx_cklp_wc_min = (DIV_ROUND_UP(4, dsi->lanes) + da_hs_trail + 1) > + * dsi->lanes / 6 - 1; > + > + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { > + horizontal_frontporch_byte = (vm->hfront_porch * > + dsi_tmp_buf_bpp - 18); > + > + v_active_roundup = (28 + horizontal_backporch_byte + ps_wc + > + horizontal_frontporch_byte) % dsi->lanes; > + if (v_active_roundup) > + horizontal_backporch_byte = horizontal_backporch_byte + > + dsi->lanes - v_active_roundup; > + > + hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 + > + horizontal_backporch_byte + ps_wc), > + dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; > + } else { > + horizontal_frontporch_byte = (vm->hfront_porch * > + dsi_tmp_buf_bpp - 12); This function has many duplication. Maybe we could reduce them like this: if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { hfp_byte_adjust = 10; ... } else { ... if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { hfp_byte_adjust = 18; } else { hfp_byte_adjust = 12; } } horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp - hfp_byte_adjust; Regards, CK > + > + v_active_roundup = (22 + horizontal_backporch_byte + ps_wc + > + horizontal_frontporch_byte) % dsi->lanes; > + if (v_active_roundup) > + horizontal_backporch_byte = horizontal_backporch_byte + > + dsi->lanes - v_active_roundup; > + > + hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 + > + horizontal_backporch_byte + ps_wc), > + dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; > + } > + } > + hstx_cklp_wc = FIELD_GET(HSTX_CKL_WC, readl(dsi->regs + DSI_HSTX_CKL_WC)); > + > + if (hstx_cklp_wc <= hstx_cklp_wc_min || > + hstx_cklp_wc >= hstx_cklp_wc_max) { > + hstx_cklp_wc = ((hstx_cklp_wc_min + hstx_cklp_wc_max) / 2) << HSTX_CKL_WC_SHIFT; > + writel(hstx_cklp_wc, dsi->regs + DSI_HSTX_CKL_WC); > + } > + hstx_cklp_wc = hstx_cklp_wc >> HSTX_CKL_WC_SHIFT; > + if (hstx_cklp_wc <= hstx_cklp_wc_min || > + hstx_cklp_wc >= hstx_cklp_wc_max) { > + DRM_WARN("Wrong setting of hstx_ckl_wc\n"); > + } > + > + lpx = dsi->phy_timing.lpx; > + da_hs_exit = dsi->phy_timing.da_hs_exit; > + da_hs_prep = dsi->phy_timing.da_hs_prepare; > + da_hs_zero = dsi->phy_timing.da_hs_zero; > + > + hs_vb_ps_wc = ps_wc - > + (lpx + da_hs_exit + da_hs_prep + da_hs_zero + 2) > + * dsi->lanes; > + horizontal_frontporch_byte = (1 << HFP_HS_EN) > + | (hs_vb_ps_wc << HFP_HS_VB_PS_WC_SHIFT) > + | (horizontal_frontporch_byte); > + > + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > + writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > + writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > +} > +
Hi, Shuijing: On Thu, 2024-08-01 at 16:11 +0800, Shuijing Li wrote: > Adding the per-frame lp function of mt8188, which can keep HFP in HS and > reduce the time required for each line to enter and exit low power. > Per Frame LP: > |<----------One Active Frame-------->| > --______________________________________----___________________ > ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^ ^HSA+HBP^^RGB^^HFP^ > > Per Line LP: > |<---------------One Active Frame----------->| > --______________--______________--______________----______________ > ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > --- [snip] > + > static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > { > u32 horizontal_sync_active_byte; > @@ -449,57 +560,61 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); > writel(vm->vactive, dsi->regs + DSI_VACT_NL); > > - if (dsi->driver_data->has_size_ctl) > - writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) | > - FIELD_PREP(DSI_WIDTH, vm->hactive), > - dsi->regs + DSI_SIZE_CON); > - > - horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); > - > - if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) > - horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10; > - else > - horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * > - dsi_tmp_buf_bpp - 10; > - > - data_phy_cycles = timing->lpx + timing->da_hs_prepare + > - timing->da_hs_zero + timing->da_hs_exit + 3; > - > - delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; > - delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; > + if (dsi->driver_data->support_per_frame_lp) > + mtk_dsi_config_vdo_timing_per_frame_lp(dsi); > + else { The 'if' part is a function, so I think the 'else' should also be a function because the both part do the similar things. Regards, CK > + if (dsi->driver_data->has_size_ctl) > + writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) | > + FIELD_PREP(DSI_WIDTH, vm->hactive), > + dsi->regs + DSI_SIZE_CON); > > - horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; > - horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte; > - data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta; > + horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); > > - if (horizontal_front_back_byte > data_phy_cycles_byte) { > - horizontal_frontporch_byte -= data_phy_cycles_byte * > - horizontal_frontporch_byte / > - horizontal_front_back_byte; > - > - horizontal_backporch_byte -= data_phy_cycles_byte * > - horizontal_backporch_byte / > - horizontal_front_back_byte; > - } else { > - DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > - } > - > - if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) && > - (dsi->lanes == 4)) { > - horizontal_sync_active_byte = > - roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > - horizontal_frontporch_byte = > - roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > - horizontal_backporch_byte = > - roundup(horizontal_backporch_byte, dsi->lanes) - 2; > - horizontal_backporch_byte -= > - (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) > + horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10; > + else > + horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * > + dsi_tmp_buf_bpp - 10; > + > + data_phy_cycles = timing->lpx + timing->da_hs_prepare + > + timing->da_hs_zero + timing->da_hs_exit + 3; > + > + delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; > + delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; > + > + horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; > + horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte; > + data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta; > + > + if (horizontal_front_back_byte > data_phy_cycles_byte) { > + horizontal_frontporch_byte -= data_phy_cycles_byte * > + horizontal_frontporch_byte / > + horizontal_front_back_byte; > + > + horizontal_backporch_byte -= data_phy_cycles_byte * > + horizontal_backporch_byte / > + horizontal_front_back_byte; > + } else { > + DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > + } > + > + if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) && > + (dsi->lanes == 4)) { > + horizontal_sync_active_byte = > + roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > + horizontal_frontporch_byte = > + roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte = > + roundup(horizontal_backporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte -= > + (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + } > + > + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > + writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > + writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > } > > - writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > - writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > - writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > - > mtk_dsi_ps_control(dsi, false); > } >
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index b6e3c011a12d..4bda8fa17c3d 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -88,12 +88,16 @@ #define DSI_HSA_WC 0x50 #define DSI_HBP_WC 0x54 #define DSI_HFP_WC 0x58 +#define HFP_HS_EN 31 +#define HFP_HS_VB_PS_WC_SHIFT 16 #define DSI_CMDQ_SIZE 0x60 #define CMDQ_SIZE 0x3f #define CMDQ_SIZE_SEL BIT(15) #define DSI_HSTX_CKL_WC 0x64 +#define HSTX_CKL_WC GENMASK(15, 2) +#define HSTX_CKL_WC_SHIFT 2 #define DSI_RX_DATA0 0x74 #define DSI_RX_DATA1 0x78 @@ -187,6 +191,7 @@ struct mtk_dsi_driver_data { bool has_shadow_ctl; bool has_size_ctl; bool cmdq_long_packet_ctl; + bool support_per_frame_lp; }; struct mtk_dsi { @@ -426,6 +431,112 @@ static void mtk_dsi_ps_control(struct mtk_dsi *dsi, bool config_vact) writel(ps_val, dsi->regs + DSI_PSCTRL); } +static void mtk_dsi_config_vdo_timing_per_frame_lp(struct mtk_dsi *dsi) +{ + u32 horizontal_sync_active_byte; + u32 horizontal_backporch_byte; + u32 horizontal_frontporch_byte; + u32 dsi_tmp_buf_bpp; + unsigned int lpx, da_hs_exit, da_hs_prep, da_hs_trail; + unsigned int da_hs_zero, ps_wc, hs_vb_ps_wc; + u32 v_active_roundup, hstx_cklp_wc; + u32 hstx_cklp_wc_max, hstx_cklp_wc_min; + struct videomode *vm = &dsi->vm; + + if (dsi->format == MIPI_DSI_FMT_RGB565) + dsi_tmp_buf_bpp = 2; + else + dsi_tmp_buf_bpp = 3; + + da_hs_trail = dsi->phy_timing.da_hs_trail; + ps_wc = dsi->vm.hactive * dsi_tmp_buf_bpp; + + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { + horizontal_sync_active_byte = + vm->hsync_len * dsi_tmp_buf_bpp - 10; + horizontal_backporch_byte = + vm->hback_porch * dsi_tmp_buf_bpp - 10; + horizontal_frontporch_byte = + vm->hfront_porch * dsi_tmp_buf_bpp - 12; + + v_active_roundup = (32 + horizontal_sync_active_byte + + horizontal_backporch_byte + ps_wc + + horizontal_frontporch_byte) % dsi->lanes; + if (v_active_roundup) + horizontal_backporch_byte = horizontal_backporch_byte + + dsi->lanes - v_active_roundup; + hstx_cklp_wc_min = (DIV_ROUND_UP((12 + 2 + 4 + + horizontal_sync_active_byte), dsi->lanes) + da_hs_trail + 1) + * dsi->lanes / 6 - 1; + hstx_cklp_wc_max = (DIV_ROUND_UP((20 + 6 + 4 + + horizontal_sync_active_byte + horizontal_backporch_byte + + ps_wc), dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; + } else { + horizontal_sync_active_byte = vm->hsync_len * dsi_tmp_buf_bpp - 4; + + horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * + dsi_tmp_buf_bpp - 10; + hstx_cklp_wc_min = (DIV_ROUND_UP(4, dsi->lanes) + da_hs_trail + 1) + * dsi->lanes / 6 - 1; + + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { + horizontal_frontporch_byte = (vm->hfront_porch * + dsi_tmp_buf_bpp - 18); + + v_active_roundup = (28 + horizontal_backporch_byte + ps_wc + + horizontal_frontporch_byte) % dsi->lanes; + if (v_active_roundup) + horizontal_backporch_byte = horizontal_backporch_byte + + dsi->lanes - v_active_roundup; + + hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 + + horizontal_backporch_byte + ps_wc), + dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; + } else { + horizontal_frontporch_byte = (vm->hfront_porch * + dsi_tmp_buf_bpp - 12); + + v_active_roundup = (22 + horizontal_backporch_byte + ps_wc + + horizontal_frontporch_byte) % dsi->lanes; + if (v_active_roundup) + horizontal_backporch_byte = horizontal_backporch_byte + + dsi->lanes - v_active_roundup; + + hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 + + horizontal_backporch_byte + ps_wc), + dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; + } + } + hstx_cklp_wc = FIELD_GET(HSTX_CKL_WC, readl(dsi->regs + DSI_HSTX_CKL_WC)); + + if (hstx_cklp_wc <= hstx_cklp_wc_min || + hstx_cklp_wc >= hstx_cklp_wc_max) { + hstx_cklp_wc = ((hstx_cklp_wc_min + hstx_cklp_wc_max) / 2) << HSTX_CKL_WC_SHIFT; + writel(hstx_cklp_wc, dsi->regs + DSI_HSTX_CKL_WC); + } + hstx_cklp_wc = hstx_cklp_wc >> HSTX_CKL_WC_SHIFT; + if (hstx_cklp_wc <= hstx_cklp_wc_min || + hstx_cklp_wc >= hstx_cklp_wc_max) { + DRM_WARN("Wrong setting of hstx_ckl_wc\n"); + } + + lpx = dsi->phy_timing.lpx; + da_hs_exit = dsi->phy_timing.da_hs_exit; + da_hs_prep = dsi->phy_timing.da_hs_prepare; + da_hs_zero = dsi->phy_timing.da_hs_zero; + + hs_vb_ps_wc = ps_wc - + (lpx + da_hs_exit + da_hs_prep + da_hs_zero + 2) + * dsi->lanes; + horizontal_frontporch_byte = (1 << HFP_HS_EN) + | (hs_vb_ps_wc << HFP_HS_VB_PS_WC_SHIFT) + | (horizontal_frontporch_byte); + + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); + writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); + writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); +} + static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) { u32 horizontal_sync_active_byte; @@ -449,57 +560,61 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); writel(vm->vactive, dsi->regs + DSI_VACT_NL); - if (dsi->driver_data->has_size_ctl) - writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) | - FIELD_PREP(DSI_WIDTH, vm->hactive), - dsi->regs + DSI_SIZE_CON); - - horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); - - if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) - horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10; - else - horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * - dsi_tmp_buf_bpp - 10; - - data_phy_cycles = timing->lpx + timing->da_hs_prepare + - timing->da_hs_zero + timing->da_hs_exit + 3; - - delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; - delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; + if (dsi->driver_data->support_per_frame_lp) + mtk_dsi_config_vdo_timing_per_frame_lp(dsi); + else { + if (dsi->driver_data->has_size_ctl) + writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) | + FIELD_PREP(DSI_WIDTH, vm->hactive), + dsi->regs + DSI_SIZE_CON); - horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; - horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte; - data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta; + horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); - if (horizontal_front_back_byte > data_phy_cycles_byte) { - horizontal_frontporch_byte -= data_phy_cycles_byte * - horizontal_frontporch_byte / - horizontal_front_back_byte; - - horizontal_backporch_byte -= data_phy_cycles_byte * - horizontal_backporch_byte / - horizontal_front_back_byte; - } else { - DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); - } - - if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) && - (dsi->lanes == 4)) { - horizontal_sync_active_byte = - roundup(horizontal_sync_active_byte, dsi->lanes) - 2; - horizontal_frontporch_byte = - roundup(horizontal_frontporch_byte, dsi->lanes) - 2; - horizontal_backporch_byte = - roundup(horizontal_backporch_byte, dsi->lanes) - 2; - horizontal_backporch_byte -= - (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) + horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10; + else + horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) * + dsi_tmp_buf_bpp - 10; + + data_phy_cycles = timing->lpx + timing->da_hs_prepare + + timing->da_hs_zero + timing->da_hs_exit + 3; + + delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; + delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; + + horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; + horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte; + data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta; + + if (horizontal_front_back_byte > data_phy_cycles_byte) { + horizontal_frontporch_byte -= data_phy_cycles_byte * + horizontal_frontporch_byte / + horizontal_front_back_byte; + + horizontal_backporch_byte -= data_phy_cycles_byte * + horizontal_backporch_byte / + horizontal_front_back_byte; + } else { + DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); + } + + if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) && + (dsi->lanes == 4)) { + horizontal_sync_active_byte = + roundup(horizontal_sync_active_byte, dsi->lanes) - 2; + horizontal_frontporch_byte = + roundup(horizontal_frontporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte = + roundup(horizontal_backporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte -= + (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; + } + + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); + writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); + writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); } - writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); - writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); - writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); - mtk_dsi_ps_control(dsi, false); } @@ -1197,6 +1312,7 @@ static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = { .has_shadow_ctl = true, .has_size_ctl = true, .cmdq_long_packet_ctl = true, + .support_per_frame_lp = true, }; static const struct of_device_id mtk_dsi_of_match[] = {
Adding the per-frame lp function of mt8188, which can keep HFP in HS and reduce the time required for each line to enter and exit low power. Per Frame LP: |<----------One Active Frame-------->| --______________________________________----___________________ ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^ ^HSA+HBP^^RGB^^HFP^ Per Line LP: |<---------------One Active Frame----------->| --______________--______________--______________----______________ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> --- Changes in v4: Drop the code related to bllp_en and bllp_wc, adjust ps_wc to dsi->vm.hactive * dsi_buf_bpp. Changes in v3: Use function in bitfield.h and get value from phy timing, per suggestion from previous thread: https://patchwork.kernel.org/project/linux-mediatek/patch/20240424091639.22759-1-shuijing.li@mediatek.com/ Changes in v2: Use bitfield macros and add new function for per prame lp and improve the format, per suggestion from previous thread: https://patchwork.kernel.org/project/linux-mediatek/patch/20240314094238.3315-1-shuijing.li@mediatek.com/ --- drivers/gpu/drm/mediatek/mtk_dsi.c | 210 ++++++++++++++++++++++------- 1 file changed, 163 insertions(+), 47 deletions(-)