| Message ID | 20240807-imx8mp-tpm-v2-1-d43f1e8f70ac@phytec.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] arm64: dts: freescale: imx8mp-phyboard-pollux: Add and enable TPM | expand |
> Subject: [PATCH v2] arm64: dts: freescale: imx8mp-phyboard-pollux: > Add and enable TPM > > Add support for TPM for phyBOARD Pollux. > > Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> > --- > Changes in v2: > - renamed tpm node to tpm@0 > - removed num-cs > - cleanup pinctrl > - Link to v1: > --- > .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 26 > ++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux- > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux- > rdk.dts > index 00a240484c25..0e8200413557 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts > @@ -103,6 +103,23 @@ reg_vcc_3v3_sw: regulator-vcc-3v3-sw { > }; > }; > > +/* TPM */ > +&ecspi1 { > + #address-cells = <1>; > + #size-cells = <0>; Duplicated with imx8mp.dtsi. Other than this: Reviewed-by: Peng Fan <peng.fan@nxp.com> Regards, Peng.
On 07/08/2024 17:18, Benjamin Hahn wrote: > Add support for TPM for phyBOARD Pollux. > > Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> > --- > Changes in v2: > - renamed tpm node to tpm@0 > - removed num-cs > - cleanup pinctrl > - Link to v1: https://lore.kernel.org/r/20240805-imx8mp-tpm-v1-1-1e89f0268999@phytec.de > --- > .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 26 ++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts > index 00a240484c25..0e8200413557 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts > @@ -103,6 +103,23 @@ reg_vcc_3v3_sw: regulator-vcc-3v3-sw { > }; > }; > > +/* TPM */ > +&ecspi1 { > + #address-cells = <1>; > + #size-cells = <0>; > + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi1>; > + status = "okay"; > + > + tpm: tpm@0 { > + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; > + reg = <0>; > + spi-max-frequency = <38000000>; > + status = "okay"; Did you disabled it anywhere? Best regards, Krzysztof
On 08.08.24 12:27, Krzysztof Kozlowski wrote: > On 07/08/2024 17:18, Benjamin Hahn wrote: >> Add support for TPM for phyBOARD Pollux. >> >> Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> >> --- >> Changes in v2: >> - renamed tpm node to tpm@0 >> - removed num-cs >> - cleanup pinctrl >> - Link to v1: https://lore.kernel.org/r/20240805-imx8mp-tpm-v1-1-1e89f0268999@phytec.de >> --- >> .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 26 ++++++++++++++++++++++ >> 1 file changed, 26 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts >> index 00a240484c25..0e8200413557 100644 >> --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts >> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts >> @@ -103,6 +103,23 @@ reg_vcc_3v3_sw: regulator-vcc-3v3-sw { >> }; >> }; >> >> +/* TPM */ >> +&ecspi1 { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_ecspi1>; >> + status = "okay"; >> + >> + tpm: tpm@0 { >> + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; >> + reg = <0>; >> + spi-max-frequency = <38000000>; >> + status = "okay"; > Did you disabled it anywhere? No, we don't disable it anywhere at the moment. Benjamin > > Best regards, > Krzysztof >
On 09/08/2024 09:11, Benjamin Hahn wrote: >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&pinctrl_ecspi1>; >>> + status = "okay"; >>> + >>> + tpm: tpm@0 { >>> + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; >>> + reg = <0>; >>> + spi-max-frequency = <38000000>; >>> + status = "okay"; >> Did you disabled it anywhere? > > No, we don't disable it anywhere at the moment. Then drop it... Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index 00a240484c25..0e8200413557 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -103,6 +103,23 @@ reg_vcc_3v3_sw: regulator-vcc-3v3-sw { }; }; +/* TPM */ +&ecspi1 { + #address-cells = <1>; + #size-cells = <0>; + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + tpm: tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0>; + spi-max-frequency = <38000000>; + status = "okay"; + }; +}; + &eqos { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; @@ -300,6 +317,15 @@ &gpio4 { }; &iomuxc { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x80 + MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x80 + MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x80 + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x00 + >; + }; + pinctrl_eqos: eqosgrp { fsl,pins = < MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
Add support for TPM for phyBOARD Pollux. Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> --- Changes in v2: - renamed tpm node to tpm@0 - removed num-cs - cleanup pinctrl - Link to v1: https://lore.kernel.org/r/20240805-imx8mp-tpm-v1-1-1e89f0268999@phytec.de --- .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) --- base-commit: 17712b7ea0756799635ba159cc773082230ed028 change-id: 20240805-imx8mp-tpm-3df607b1f5f1 Best regards,