| Message ID | 20240807130835.26739-1-jianhua.lin@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v5,1/1] media: mediatek: jpeg: support 34bits | expand |
Hi Jianhua,
kernel test robot noticed the following build errors:
[auto build test ERROR on media-tree/master]
[also build test ERROR on linuxtv-media-stage/master sailus-media-tree/master linus/master v6.11-rc2 next-20240807]
[cannot apply to sailus-media-tree/streams]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jianhua-Lin/media-mediatek-jpeg-support-34bits/20240807-211309
base: git://linuxtv.org/media_tree.git master
patch link: https://lore.kernel.org/r/20240807130835.26739-1-jianhua.lin%40mediatek.com
patch subject: [PATCH v5 1/1] media: mediatek: jpeg: support 34bits
config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20240808/202408080501.8b0EGVQW-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 423aec6573df4424f90555468128e17073ddc69e)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240808/202408080501.8b0EGVQW-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408080501.8b0EGVQW-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:14:
In file included from arch/hexagon/include/asm/io.h:328:
include/asm-generic/io.h:548:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
548 | val = __raw_readb(PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
include/asm-generic/io.h:561:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
561 | val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
| ~~~~~~~~~~ ^
include/uapi/linux/byteorder/little_endian.h:37:51: note: expanded from macro '__le16_to_cpu'
37 | #define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
| ^
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:14:
In file included from arch/hexagon/include/asm/io.h:328:
include/asm-generic/io.h:574:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
574 | val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
| ~~~~~~~~~~ ^
include/uapi/linux/byteorder/little_endian.h:35:51: note: expanded from macro '__le32_to_cpu'
35 | #define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
| ^
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:14:
In file included from arch/hexagon/include/asm/io.h:328:
include/asm-generic/io.h:585:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
585 | __raw_writeb(value, PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
include/asm-generic/io.h:595:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
595 | __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
include/asm-generic/io.h:605:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
605 | __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:18:
In file included from include/media/media-device.h:16:
In file included from include/linux/pci.h:2669:
In file included from include/linux/dma-mapping.h:11:
In file included from include/linux/scatterlist.h:8:
In file included from include/linux/mm.h:2228:
include/linux/vmstat.h:514:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
514 | return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
| ~~~~~~~~~~~ ^ ~~~
>> drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:104:11: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
104 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper);
| ^
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:111:11: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
111 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper);
| ^
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:138:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
138 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr));
| ^
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:144:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
144 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr));
| ^
7 warnings and 4 errors generated.
--
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:14:
In file included from arch/hexagon/include/asm/io.h:328:
include/asm-generic/io.h:548:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
548 | val = __raw_readb(PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
include/asm-generic/io.h:561:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
561 | val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
| ~~~~~~~~~~ ^
include/uapi/linux/byteorder/little_endian.h:37:51: note: expanded from macro '__le16_to_cpu'
37 | #define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
| ^
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:14:
In file included from arch/hexagon/include/asm/io.h:328:
include/asm-generic/io.h:574:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
574 | val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
| ~~~~~~~~~~ ^
include/uapi/linux/byteorder/little_endian.h:35:51: note: expanded from macro '__le32_to_cpu'
35 | #define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
| ^
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:14:
In file included from arch/hexagon/include/asm/io.h:328:
include/asm-generic/io.h:585:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
585 | __raw_writeb(value, PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
include/asm-generic/io.h:595:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
595 | __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
include/asm-generic/io.h:605:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
605 | __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
| ~~~~~~~~~~ ^
In file included from drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:18:
In file included from include/media/media-device.h:16:
In file included from include/linux/pci.h:2669:
In file included from include/linux/dma-mapping.h:11:
In file included from include/linux/scatterlist.h:8:
In file included from include/linux/mm.h:2228:
include/linux/vmstat.h:514:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
514 | return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
| ~~~~~~~~~~~ ^ ~~~
>> drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:294:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
294 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y));
| ^
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:312:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
312 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y));
| ^
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:353:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
353 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(ptr));
| ^
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:367:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
367 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr));
| ^
7 warnings and 4 errors generated.
vim +/FIELD_PREP +104 drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
87
88 void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx, void __iomem *base,
89 struct vb2_buffer *src_buf)
90 {
91 int i;
92 dma_addr_t dma_addr;
93 u32 val;
94 u32 upper;
95 bool support_34bit = ctx->jpeg->variant->support_34bit;
96
97 for (i = 0; i < src_buf->num_planes; i++) {
98 dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, i) +
99 src_buf->planes[i].data_offset;
100 if (!i) {
101 writel(dma_addr, base + JPEG_ENC_SRC_LUMA_ADDR);
102 if (support_34bit) {
103 upper = upper_32_bits(dma_addr);
> 104 val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper);
105 writel(val, base + JPEG_ENC_SRC_LUMA_ADDR_EXT);
106 }
107 } else {
108 writel(dma_addr, base + JPEG_ENC_SRC_CHROMA_ADDR);
109 if (support_34bit) {
110 upper = upper_32_bits(dma_addr);
111 val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper);
112 writel(val, base + JPEG_ENC_SRC_CHRO_ADDR_EXT);
113 }
114 }
115 }
116 }
117 EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_src);
118
Hi Jianhua, kernel test robot noticed the following build errors: [auto build test ERROR on media-tree/master] [also build test ERROR on linuxtv-media-stage/master sailus-media-tree/master linus/master v6.11-rc2 next-20240807] [cannot apply to sailus-media-tree/streams] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Jianhua-Lin/media-mediatek-jpeg-support-34bits/20240807-211309 base: git://linuxtv.org/media_tree.git master patch link: https://lore.kernel.org/r/20240807130835.26739-1-jianhua.lin%40mediatek.com patch subject: [PATCH v5 1/1] media: mediatek: jpeg: support 34bits config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20240808/202408080826.MtdkQQdh-lkp@intel.com/config) compiler: alpha-linux-gcc (GCC) 13.3.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240808/202408080826.MtdkQQdh-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202408080826.MtdkQQdh-lkp@intel.com/ All errors (new ones prefixed by >>): drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c: In function 'mtk_jpeg_set_enc_src': >> drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c:104:39: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration] 104 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper); | ^~~~~~~~~~ cc1: some warnings being treated as errors -- drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c: In function 'mtk_jpeg_dec_set_dst_bank0': >> drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c:294:23: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration] 294 | val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y)); | ^~~~~~~~~~ cc1: some warnings being treated as errors vim +/FIELD_PREP +104 drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c 87 88 void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx, void __iomem *base, 89 struct vb2_buffer *src_buf) 90 { 91 int i; 92 dma_addr_t dma_addr; 93 u32 val; 94 u32 upper; 95 bool support_34bit = ctx->jpeg->variant->support_34bit; 96 97 for (i = 0; i < src_buf->num_planes; i++) { 98 dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, i) + 99 src_buf->planes[i].data_offset; 100 if (!i) { 101 writel(dma_addr, base + JPEG_ENC_SRC_LUMA_ADDR); 102 if (support_34bit) { 103 upper = upper_32_bits(dma_addr); > 104 val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper); 105 writel(val, base + JPEG_ENC_SRC_LUMA_ADDR_EXT); 106 } 107 } else { 108 writel(dma_addr, base + JPEG_ENC_SRC_CHROMA_ADDR); 109 if (support_34bit) { 110 upper = upper_32_bits(dma_addr); 111 val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper); 112 writel(val, base + JPEG_ENC_SRC_CHRO_ADDR_EXT); 113 } 114 } 115 } 116 } 117 EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_src); 118
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c index ac48658e2de4..f4e3b90195cf 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1030,6 +1030,7 @@ static void mtk_jpeg_dec_device_run(void *priv) spin_lock_irqsave(&jpeg->hw_lock, flags); mtk_jpeg_dec_reset(jpeg->reg_base); mtk_jpeg_dec_set_config(jpeg->reg_base, + jpeg->variant->support_34bit, &jpeg_src_buf->dec_param, jpeg_src_buf->bs_size, &bs, @@ -1564,7 +1565,8 @@ static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg_dev *jpeg) src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); - result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base); + result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base, + jpeg->variant->support_34bit); vb2_set_plane_payload(&dst_buf->vb2_buf, 0, result_size); buf_state = VB2_BUF_STATE_DONE; @@ -1764,6 +1766,7 @@ static void mtk_jpegdec_worker(struct work_struct *work) ctx->total_frame_num++; mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base); mtk_jpeg_dec_set_config(comp_jpeg[hw_id]->reg_base, + jpeg->variant->support_34bit, &jpeg_src_buf->dec_param, jpeg_src_buf->bs_size, &bs, @@ -1860,6 +1863,10 @@ static struct clk_bulk_data mtk_jpeg_clocks[] = { { .id = "jpgenc" }, }; +static struct clk_bulk_data mtk_jpeg_dec_clocks[] = { + { .id = "jpgdec" }, +}; + static struct clk_bulk_data mt8173_jpeg_dec_clocks[] = { { .id = "jpgdec-smi" }, { .id = "jpgdec" }, @@ -1922,6 +1929,38 @@ static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = { .jpeg_worker = mtk_jpegdec_worker, }; +static const struct mtk_jpeg_variant mtk8188_jpegenc_drvdata = { + .clks = mtk_jpeg_clocks, + .num_clks = ARRAY_SIZE(mtk_jpeg_clocks), + .formats = mtk_jpeg_enc_formats, + .num_formats = MTK_JPEG_ENC_NUM_FORMATS, + .qops = &mtk_jpeg_enc_qops, + .irq_handler = mtk_jpeg_enc_irq, + .hw_reset = mtk_jpeg_enc_reset, + .m2m_ops = &mtk_jpeg_enc_m2m_ops, + .dev_name = "mtk-jpeg-enc", + .ioctl_ops = &mtk_jpeg_enc_ioctl_ops, + .out_q_default_fourcc = V4L2_PIX_FMT_YUYV, + .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG, + .support_34bit = true, +}; + +static const struct mtk_jpeg_variant mtk8188_jpegdec_drvdata = { + .clks = mtk_jpeg_dec_clocks, + .num_clks = ARRAY_SIZE(mtk_jpeg_dec_clocks), + .formats = mtk_jpeg_dec_formats, + .num_formats = MTK_JPEG_DEC_NUM_FORMATS, + .qops = &mtk_jpeg_dec_qops, + .irq_handler = mtk_jpeg_dec_irq, + .hw_reset = mtk_jpeg_dec_reset, + .m2m_ops = &mtk_jpeg_dec_m2m_ops, + .dev_name = "mtk-jpeg-dec", + .ioctl_ops = &mtk_jpeg_dec_ioctl_ops, + .out_q_default_fourcc = V4L2_PIX_FMT_JPEG, + .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, + .support_34bit = true, +}; + static const struct of_device_id mtk_jpeg_match[] = { { .compatible = "mediatek,mt8173-jpgdec", @@ -1943,6 +1982,14 @@ static const struct of_device_id mtk_jpeg_match[] = { .compatible = "mediatek,mt8195-jpgdec", .data = &mtk8195_jpegdec_drvdata, }, + { + .compatible = "mediatek,mt8188-jpgenc", + .data = &mtk8188_jpegenc_drvdata, + }, + { + .compatible = "mediatek,mt8188-jpgdec", + .data = &mtk8188_jpegdec_drvdata, + }, {}, }; diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h index 8ba6e757e11a..a908d52f7e94 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -34,6 +34,8 @@ #define MTK_JPEG_MAX_EXIF_SIZE (64 * 1024) +#define MTK_JPEG_ADDR_MASK GENMASK(1, 0) + /** * enum mtk_jpeg_ctx_state - states of the context state machine * @MTK_JPEG_INIT: current state is initialized @@ -62,6 +64,7 @@ enum mtk_jpeg_ctx_state { * @cap_q_default_fourcc: capture queue default fourcc * @multi_core: mark jpeg hw is multi_core or not * @jpeg_worker: jpeg dec or enc worker + * @support_34bit: flag to check if support dma_address 34bit */ struct mtk_jpeg_variant { struct clk_bulk_data *clks; @@ -78,6 +81,7 @@ struct mtk_jpeg_variant { u32 cap_q_default_fourcc; bool multi_core; void (*jpeg_worker)(struct work_struct *work); + bool support_34bit; }; struct mtk_jpeg_src_buf { diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index 4a6ee211e18f..9b89761c9857 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -270,7 +270,7 @@ void mtk_jpeg_dec_reset(void __iomem *base) EXPORT_SYMBOL_GPL(mtk_jpeg_dec_reset); static void mtk_jpeg_dec_set_brz_factor(void __iomem *base, u8 yscale_w, - u8 yscale_h, u8 uvscale_w, u8 uvscale_h) + u8 yscale_h, u8 uvscale_w, u8 uvscale_h) { u32 val; @@ -279,23 +279,43 @@ static void mtk_jpeg_dec_set_brz_factor(void __iomem *base, u8 yscale_w, writel(val, base + JPGDEC_REG_BRZ_FACTOR); } -static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, u32 addr_y, - u32 addr_u, u32 addr_v) +static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, bool support_34bit, + dma_addr_t addr_y, dma_addr_t addr_u, dma_addr_t addr_v) { + u32 val; + mtk_jpeg_verify_align(addr_y, 16, JPGDEC_REG_DEST_ADDR0_Y); writel(addr_y, base + JPGDEC_REG_DEST_ADDR0_Y); mtk_jpeg_verify_align(addr_u, 16, JPGDEC_REG_DEST_ADDR0_U); writel(addr_u, base + JPGDEC_REG_DEST_ADDR0_U); mtk_jpeg_verify_align(addr_v, 16, JPGDEC_REG_DEST_ADDR0_V); writel(addr_v, base + JPGDEC_REG_DEST_ADDR0_V); + if (support_34bit) { + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y)); + writel(val, base + JPGDEC_REG_DEST_ADDR0_Y_EXT); + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_u)); + writel(val, base + JPGDEC_REG_DEST_ADDR0_U_EXT); + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_v)); + writel(val, base + JPGDEC_REG_DEST_ADDR0_V_EXT); + } } -static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, u32 addr_y, - u32 addr_u, u32 addr_v) +static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, bool support_34bit, + dma_addr_t addr_y, dma_addr_t addr_u, dma_addr_t addr_v) { + u32 val; + writel(addr_y, base + JPGDEC_REG_DEST_ADDR1_Y); writel(addr_u, base + JPGDEC_REG_DEST_ADDR1_U); writel(addr_v, base + JPGDEC_REG_DEST_ADDR1_V); + if (support_34bit) { + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y)); + writel(val, base + JPGDEC_REG_DEST_ADDR1_Y_EXT); + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_u)); + writel(val, base + JPGDEC_REG_DEST_ADDR1_U_EXT); + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_v)); + writel(val, base + JPGDEC_REG_DEST_ADDR1_V_EXT); + } } static void mtk_jpeg_dec_set_mem_stride(void __iomem *base, u32 stride_y, @@ -322,18 +342,31 @@ static void mtk_jpeg_dec_set_dec_mode(void __iomem *base, u32 mode) writel(mode & 0x03, base + JPGDEC_REG_OPERATION_MODE); } -static void mtk_jpeg_dec_set_bs_write_ptr(void __iomem *base, u32 ptr) +static void mtk_jpeg_dec_set_bs_write_ptr(void __iomem *base, + bool support_34bit, dma_addr_t ptr) { + u32 val; + mtk_jpeg_verify_align(ptr, 16, JPGDEC_REG_FILE_BRP); writel(ptr, base + JPGDEC_REG_FILE_BRP); + if (support_34bit) { + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(ptr)); + writel(val, base + JPGDEC_REG_FILE_BRP_EXT); + } } -static void mtk_jpeg_dec_set_bs_info(void __iomem *base, u32 addr, u32 size, - u32 bitstream_size) +static void mtk_jpeg_dec_set_bs_info(void __iomem *base, bool support_34bit, + dma_addr_t addr, u32 size, u32 bitstream_size) { + u32 val; + mtk_jpeg_verify_align(addr, 16, JPGDEC_REG_FILE_ADDR); mtk_jpeg_verify_align(size, 128, JPGDEC_REG_FILE_TOTAL_SIZE); writel(addr, base + JPGDEC_REG_FILE_ADDR); + if (support_34bit) { + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr)); + writel(val, base + JPGDEC_REG_FILE_ADDR_EXT); + } writel(size, base + JPGDEC_REG_FILE_TOTAL_SIZE); writel(bitstream_size, base + JPGDEC_REG_BIT_STREAM_SIZE); } @@ -404,6 +437,7 @@ static void mtk_jpeg_dec_set_sampling_factor(void __iomem *base, u32 comp_num, } void mtk_jpeg_dec_set_config(void __iomem *base, + bool support_34bits, struct mtk_jpeg_dec_param *cfg, u32 bitstream_size, struct mtk_jpeg_bs *bs, @@ -413,8 +447,9 @@ void mtk_jpeg_dec_set_config(void __iomem *base, mtk_jpeg_dec_set_dec_mode(base, 0); mtk_jpeg_dec_set_comp0_du(base, cfg->unit_num); mtk_jpeg_dec_set_total_mcu(base, cfg->total_mcu); - mtk_jpeg_dec_set_bs_info(base, bs->str_addr, bs->size, bitstream_size); - mtk_jpeg_dec_set_bs_write_ptr(base, bs->end_addr); + mtk_jpeg_dec_set_bs_info(base, support_34bits, bs->str_addr, + bs->size, bitstream_size); + mtk_jpeg_dec_set_bs_write_ptr(base, support_34bits, bs->end_addr); mtk_jpeg_dec_set_du_membership(base, cfg->membership, 1, (cfg->comp_num == 1) ? 1 : 0); mtk_jpeg_dec_set_comp_id(base, cfg->comp_id[0], cfg->comp_id[1], @@ -432,9 +467,9 @@ void mtk_jpeg_dec_set_config(void __iomem *base, cfg->mem_stride[1]); mtk_jpeg_dec_set_img_stride(base, cfg->img_stride[0], cfg->img_stride[1]); - mtk_jpeg_dec_set_dst_bank0(base, fb->plane_addr[0], + mtk_jpeg_dec_set_dst_bank0(base, support_34bits, fb->plane_addr[0], fb->plane_addr[1], fb->plane_addr[2]); - mtk_jpeg_dec_set_dst_bank1(base, 0, 0, 0); + mtk_jpeg_dec_set_dst_bank1(base, support_34bits, 0, 0, 0); mtk_jpeg_dec_set_dma_group(base, cfg->dma_mcu, cfg->dma_group, cfg->dma_last_mcu); mtk_jpeg_dec_set_pause_mcu_idx(base, cfg->total_mcu); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.h index 8c31c6b12417..2948c9c300a4 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.h @@ -71,6 +71,7 @@ int mtk_jpeg_dec_fill_param(struct mtk_jpeg_dec_param *param); u32 mtk_jpeg_dec_get_int_status(void __iomem *dec_reg_base); u32 mtk_jpeg_dec_enum_result(u32 irq_result); void mtk_jpeg_dec_set_config(void __iomem *base, + bool support_34bits, struct mtk_jpeg_dec_param *cfg, u32 bitstream_size, struct mtk_jpeg_bs *bs, diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_reg.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_reg.h index 27b7711ca341..e94f52de7c69 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_reg.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_reg.h @@ -46,5 +46,13 @@ #define JPGDEC_REG_INTERRUPT_STATUS 0x0274 #define JPGDEC_REG_STATUS 0x0278 #define JPGDEC_REG_BIT_STREAM_SIZE 0x0344 +#define JPGDEC_REG_DEST_ADDR0_Y_EXT 0x0360 +#define JPGDEC_REG_DEST_ADDR0_U_EXT 0x0364 +#define JPGDEC_REG_DEST_ADDR0_V_EXT 0x0368 +#define JPGDEC_REG_DEST_ADDR1_Y_EXT 0x036c +#define JPGDEC_REG_DEST_ADDR1_U_EXT 0x0370 +#define JPGDEC_REG_DEST_ADDR1_V_EXT 0x0374 +#define JPGDEC_REG_FILE_ADDR_EXT 0x0378 +#define JPGDEC_REG_FILE_BRP_EXT 0x037c #endif /* _MTK_JPEG_REG_H */ diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index f8fa3b841ccf..d34652636bbe 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -62,9 +62,15 @@ void mtk_jpeg_enc_reset(void __iomem *base) } EXPORT_SYMBOL_GPL(mtk_jpeg_enc_reset); -u32 mtk_jpeg_enc_get_file_size(void __iomem *base) +u32 mtk_jpeg_enc_get_file_size(void __iomem *base, bool support_34bit) { - return readl(base + JPEG_ENC_DMA_ADDR0) - + /* + * The dma addr0 to be shifted left by 2 bits + * for support greater than 4G address. + */ + u8 shift = (support_34bit) ? 2 : 0; + + return (readl(base + JPEG_ENC_DMA_ADDR0) << shift) - readl(base + JPEG_ENC_DST_ADDR0); } EXPORT_SYMBOL_GPL(mtk_jpeg_enc_get_file_size); @@ -84,14 +90,28 @@ void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx, void __iomem *base, { int i; dma_addr_t dma_addr; + u32 val; + u32 upper; + bool support_34bit = ctx->jpeg->variant->support_34bit; for (i = 0; i < src_buf->num_planes; i++) { dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, i) + src_buf->planes[i].data_offset; - if (!i) + if (!i) { writel(dma_addr, base + JPEG_ENC_SRC_LUMA_ADDR); - else + if (support_34bit) { + upper = upper_32_bits(dma_addr); + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper); + writel(val, base + JPEG_ENC_SRC_LUMA_ADDR_EXT); + } + } else { writel(dma_addr, base + JPEG_ENC_SRC_CHROMA_ADDR); + if (support_34bit) { + upper = upper_32_bits(dma_addr); + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper); + writel(val, base + JPEG_ENC_SRC_CHRO_ADDR_EXT); + } + } } } EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_src); @@ -103,6 +123,8 @@ void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base, size_t size; u32 dma_addr_offset; u32 dma_addr_offsetmask; + u32 val; + bool support_34bit = ctx->jpeg->variant->support_34bit; dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0); dma_addr_offset = ctx->enable_exif ? MTK_JPEG_MAX_EXIF_SIZE : 0; @@ -112,7 +134,16 @@ void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base, writel(dma_addr_offset & ~0xf, base + JPEG_ENC_OFFSET_ADDR); writel(dma_addr_offsetmask & 0xf, base + JPEG_ENC_BYTE_OFFSET_MASK); writel(dma_addr & ~0xf, base + JPEG_ENC_DST_ADDR0); - writel((dma_addr + size) & ~0xf, base + JPEG_ENC_STALL_ADDR0); + if (support_34bit) { + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr)); + writel(val, base + JPEG_ENC_DEST_ADDR0_EXT); + } + dma_addr += size; + writel(dma_addr & ~0xf, base + JPEG_ENC_STALL_ADDR0); + if (support_34bit) { + val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr)); + writel(val, base + JPEG_ENC_STALL_ADDR0_EXT); + } } EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_dst); @@ -278,7 +309,8 @@ static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv) if (!(irq_status & JPEG_ENC_INT_STATUS_DONE)) dev_warn(jpeg->dev, "Jpg Enc occurs unknown Err."); - result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base); + result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base, + ctx->jpeg->variant->support_34bit); vb2_set_plane_payload(&dst_buf->vb2_buf, 0, result_size); buf_state = VB2_BUF_STATE_DONE; v4l2_m2m_buf_done(src_buf, buf_state); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.h index 61c60e4e58ea..31ec9030ae88 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.h @@ -68,6 +68,11 @@ #define JPEG_ENC_DCM_CTRL 0x300 #define JPEG_ENC_CODEC_SEL 0x314 #define JPEG_ENC_ULTRA_THRES 0x318 +#define JPEG_ENC_SRC_LUMA_ADDR_EXT 0x584 +#define JPEG_ENC_SRC_CHRO_ADDR_EXT 0x588 +#define JPEG_ENC_Q_TBL_ADDR_EXT 0x58C +#define JPEG_ENC_DEST_ADDR0_EXT 0x590 +#define JPEG_ENC_STALL_ADDR0_EXT 0x594 /** * struct mtk_jpeg_enc_qlt - JPEG encoder quality data @@ -80,7 +85,7 @@ struct mtk_jpeg_enc_qlt { }; void mtk_jpeg_enc_reset(void __iomem *base); -u32 mtk_jpeg_enc_get_file_size(void __iomem *base); +u32 mtk_jpeg_enc_get_file_size(void __iomem *base, bool support_34bit); void mtk_jpeg_enc_start(void __iomem *enc_reg_base); void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx, void __iomem *base, struct vb2_buffer *src_buf);
the iommu HW supported 34bits iova space(16GB), but mediatek jpeg enc/dec driver still is 32bit, then need to set the bit32/bit33 iova to jpeg HW. Signed-off-by: Jianhua Lin <jianhua.lin@mediatek.com> --- Changes compared with v4: - remove all instances of '.support_34bit = false', and keep only the true assignments. .../platform/mediatek/jpeg/mtk_jpeg_core.c | 49 ++++++++++++++- .../platform/mediatek/jpeg/mtk_jpeg_core.h | 4 ++ .../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 59 +++++++++++++++---- .../platform/mediatek/jpeg/mtk_jpeg_dec_hw.h | 1 + .../platform/mediatek/jpeg/mtk_jpeg_dec_reg.h | 8 +++ .../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 44 ++++++++++++-- .../platform/mediatek/jpeg/mtk_jpeg_enc_hw.h | 7 ++- 7 files changed, 152 insertions(+), 20 deletions(-)