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Reviewed-by: Aniket Limaye Signed-off-by: Manorit Chawdhry --- .../arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 20 ++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 13 ++++++++++++- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 7 +++++++ 4 files changed, 41 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 6593c5da82c0..134a43346c13 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -129,6 +129,7 @@ J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */ J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */ J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */ >; + bootph-all; }; wkup_uart0_pins_default: wkup-uart0-default-pins { @@ -136,6 +137,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins { J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ >; + bootph-all; }; mcu_cpsw_pins_default: mcu-cpsw-default-pins { @@ -159,6 +161,7 @@ wkup_gpio_pins_default: wkup-gpio-default-pins { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x70, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */ >; + bootph-all; }; mcu_mdio_pins_default: mcu-mdio1-default-pins { @@ -204,6 +207,7 @@ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */ J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */ J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */ >; + bootph-all; }; main_uart1_pins_default: main-uart1-default-pins { @@ -238,6 +242,7 @@ J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */ J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */ J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */ >; + bootph-all; }; vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { @@ -259,6 +264,7 @@ main_usbss0_pins_default: main-usbss0-default-pins { pinctrl-single,pins = < J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ >; + bootph-all; }; }; @@ -267,12 +273,14 @@ &wkup_uart0 { status = "reserved"; pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; + bootph-all; }; &mcu_uart0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_uart0_pins_default>; + bootph-all; }; &main_uart0 { @@ -281,6 +289,7 @@ &main_uart0 { power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; + bootph-all; }; &main_uart1 { @@ -310,6 +319,7 @@ &wkup_gpio0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&wkup_gpio_pins_default>; + bootph-all; }; &mcu_cpsw { @@ -341,6 +351,7 @@ exp1: gpio@20 { reg = <0x20>; gpio-controller; #gpio-cells = <2>; + bootph-all; }; exp2: gpio@22 { @@ -348,6 +359,7 @@ exp2: gpio@22 { reg = <0x22>; gpio-controller; #gpio-cells = <2>; + bootph-all; }; }; @@ -381,6 +393,7 @@ &main_sdhci0 { non-removable; ti,driver-strength-ohm = <50>; disable-wp; + bootph-all; }; &main_sdhci1 { @@ -392,20 +405,24 @@ &main_sdhci1 { vqmmc-supply = <&vdd_sd_dv>; ti,driver-strength-ohm = <50>; disable-wp; + bootph-all; }; &serdes_ln_ctrl { idle-states = , , , ; + bootph-all; }; &usb_serdes_mux { idle-states = <1>; /* USB0 to SERDES lane 3 */ + bootph-all; }; &usbss0 { pinctrl-names = "default"; pinctrl-0 = <&main_usbss0_pins_default>; + bootph-all; ti,vbus-divider; ti,usb2-only; }; @@ -413,6 +430,7 @@ &usbss0 { &usb0 { dr_mode = "otg"; maximum-speed = "high-speed"; + bootph-all; }; &tscadc0 { @@ -432,6 +450,7 @@ serdes0_pcie_link: phy@0 { #phy-cells = <0>; cdns,phy-type = ; resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + bootph-all; }; serdes0_qsgmii_link: phy@1 { @@ -440,6 +459,7 @@ serdes0_qsgmii_link: phy@1 { #phy-cells = <0>; cdns,phy-type = ; resets = <&serdes_wiz0 3>; + bootph-all; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 9386bf3ef9f6..ac9c0a939461 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -136,6 +136,7 @@ secure_proxy_main: mailbox@32c00000 { <0x00 0x32800000 0x00 0x100000>; interrupt-names = "rx_011"; interrupts = ; + bootph-all; }; hwspinlock: spinlock@30e00000 { @@ -1527,6 +1528,7 @@ main_r5fss0_core1: r5f@5d00000 { main_esm: esm@700000 { compatible = "ti,j721e-esm"; reg = <0x0 0x700000 0x0 0x1000>; + bootph-pre-ram; ti,esm-pins = <656>, <657>; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 5097d192c2b2..7fc6f268bfe6 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -21,16 +21,19 @@ dmsc: system-controller@44083000 { k3_pds: power-controller { compatible = "ti,sci-pm-domain"; #power-domain-cells = <2>; + bootph-all; }; k3_clks: clock-controller { compatible = "ti,k2g-sci-clk"; #clock-cells = <2>; + bootph-all; }; k3_reset: reset-controller { compatible = "ti,sci-reset"; #reset-cells = <2>; + bootph-all; }; }; @@ -44,6 +47,7 @@ mcu_timer0: timer@40400000 { assigned-clocks = <&k3_clks 35 1>; assigned-clock-parents = <&k3_clks 35 2>; power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; + bootph-pre-ram; ti,timer-pwm; }; @@ -191,6 +195,7 @@ wkup_conf: bus@43000000 { chipid: chipid@14 { compatible = "ti,am654-chipid"; reg = <0x14 0x4>; + bootph-all; }; }; @@ -344,6 +349,7 @@ mcu_ringacc: ringacc@2b800000 { <0x00 0x28440000 0x00 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; + bootph-all; ti,num-rings = <286>; ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ ti,sci = <&dmsc>; @@ -363,6 +369,7 @@ mcu_udmap: dma-controller@285c0000 { "tchan", "rchan", "rflow"; msi-parent = <&main_udmass_inta>; #dma-cells = <1>; + bootph-all; ti,sci = <&dmsc>; ti,sci-dev-id = <236>; @@ -383,6 +390,8 @@ secure_proxy_mcu: mailbox@2a480000 { reg = <0x0 0x2a480000 0x0 0x80000>, <0x0 0x2a380000 0x0 0x80000>, <0x0 0x2a400000 0x0 0x80000>; + bootph-pre-ram; + /* * Marked Disabled: * Node is incomplete as it is meant for bootloaders and @@ -534,6 +543,7 @@ hbmc_mux: mux-controller@47000004 { reg = <0x00 0x47000004 0x00 0x4>; #mux-control-cells = <1>; mux-reg-masks = <0x0 0x2>; /* HBMC select */ + bootph-all; }; hbmc: hyperbus@47034000 { @@ -652,13 +662,14 @@ wkup_vtm0: temperature-sensor@42040000 { <0x00 0x42050000 0x00 0x350>; power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; #thermal-sensor-cells = <1>; + bootph-pre-ram; }; mcu_esm: esm@40800000 { compatible = "ti,j721e-esm"; reg = <0x00 0x40800000 0x00 0x1000>; - ti,esm-pins = <95>; bootph-pre-ram; + ti,esm-pins = <95>; }; mcu_mcan0: can@40528000 { diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index 89b68325e4e2..2b4aa02b2077 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -121,6 +121,7 @@ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */ J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */ J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ >; + bootph-all; }; mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { @@ -137,6 +138,7 @@ J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ >; + bootph-all; }; }; @@ -146,6 +148,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins { J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */ J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ >; + bootph-all; }; }; @@ -163,6 +166,7 @@ main_i2c0_pins_default: main-i2c0-default-pins { J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ >; + bootph-all; }; main_mcan0_pins_default: main-mcan0-default-pins { @@ -186,6 +190,7 @@ &hbmc { flash@0,0 { compatible = "cypress,hyperflash", "cfi-flash"; reg = <0x00 0x00 0x4000000>; + bootph-all; partitions { compatible = "fixed-partitions"; @@ -330,6 +335,7 @@ bucka1: buck1 { regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; + bootph-all; }; bucka2: buck2 { @@ -503,6 +509,7 @@ partition@800000 { partition@3fc0000 { label = "ospi.phypattern"; reg = <0x3fc0000 0x40000>; + bootph-all; }; }; };