| Message ID | 20240820104034.15607-2-hnagalla@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add R5F and C7x DSP nodes for AM62a SoC | expand |
On 8/20/24 5:40 AM, Hari Nagalla wrote: > From: Jai Luthra <j-luthra@ti.com> > > AM62A SoCs have a C7xv DSP subsystem with Analytics engine capability. > This subsystem is intended for deep learning purposes. Define the > device node for C7xv DSP. > > Signed-off-by: Jai Luthra <j-luthra@ti.com> > Signed-off-by: Hari Nagalla <hnagalla@ti.com> > --- Reviewed-by: Andrew Davis <afd@ti.com> > arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > index 916fcf3cc57d..818005b8954d 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > @@ -1088,4 +1088,15 @@ vpu: video-codec@30210000 { > clocks = <&k3_clks 204 2>; > power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>; > }; > + > + c7x_0: dsp@7e000000 { > + compatible = "ti,am62a-c7xv-dsp"; > + reg = <0x00 0x7e000000 0x00 0x00100000>; > + reg-names = "l2sram"; > + ti,sci = <&dmsc>; > + ti,sci-dev-id = <208>; > + ti,sci-proc-ids = <0x04 0xff>; > + resets = <&k3_reset 208 1>; > + firmware-name = "am62a-c71_0-fw"; > + }; > };
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 916fcf3cc57d..818005b8954d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -1088,4 +1088,15 @@ vpu: video-codec@30210000 { clocks = <&k3_clks 204 2>; power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>; }; + + c7x_0: dsp@7e000000 { + compatible = "ti,am62a-c7xv-dsp"; + reg = <0x00 0x7e000000 0x00 0x00100000>; + reg-names = "l2sram"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <208>; + ti,sci-proc-ids = <0x04 0xff>; + resets = <&k3_reset 208 1>; + firmware-name = "am62a-c71_0-fw"; + }; };