From patchwork Wed Aug 21 10:59:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Dahl X-Patchwork-Id: 13771240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E77D4C52D7C for ; Wed, 21 Aug 2024 11:05:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TJAnNoD40VE5kpvISU24IPj7vHBlSQ5pDs+zABOQSs0=; b=BAOq6CY8qFMQYcy/sI7aQ6FXSH kFDMUI7GWO6lRZC+ot9SjAi5/LoLh267FF6+65FPsD8rahhFIaz//zsMMZ5i3Z3uH/NJJCoz1asWN TclIhycqDDtVz82fYI1DqXZx4w/8AHNGlGZtuylS7FI2/peWgOjB8SjtJc9XZx46EDdoH6XcnKQtQ Z4CWS3L9Kzlam7ebKCHUAv2bMdS3qPaA7Kt3LMvSO8vdZJdESmgtzy7JU8Lj5JE2JZa1ZuHRnzo/e bg/2v/L2rVbkAQMBek0K/8umeZE9dyd2bDwqogS7XitkvsPTLdCv0etENsL6+QE9FIUTXfemF9IbQ sL/N3g1Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sgj9N-00000008ZUJ-1X1y; Wed, 21 Aug 2024 11:05:13 +0000 Received: from mail.thorsis.com ([217.92.40.78]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sgj4H-00000008XUW-0or7 for linux-arm-kernel@lists.infradead.org; Wed, 21 Aug 2024 11:00:06 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 87DDB1483DF7; Wed, 21 Aug 2024 12:59:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=thorsis.com; s=dkim; t=1724237995; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=TJAnNoD40VE5kpvISU24IPj7vHBlSQ5pDs+zABOQSs0=; b=YMTL7SeQM64uKQNcWd8bzFevbMhV0oqgifu10n6KA86rdiPH5/XtLyoqVc+EjgRrO042ZV WspHsUoaxdQq2QWugRBxsls/7Lr67GHSs4My+YXTlAWDHxnAO71iIh1hQNfQwz22PC9Xb7 VFt8vRJbDCBibIR5iHN95fGK2EdFn3g2yAr7zDjHfDL/8WF7Ee/PcbuTenMYgRw/EJ90k8 AYoiuABeJ1Qz8Zg4W8Q+Zoq3o3UwsFXw5iWE7tlW7fXqPdiWycUMIYkYy16Cy9dOQbywCK t5eOW43r8s7ziqZyRRTWZ7q7pax4+IRdh2JtBQWCJ44zTUryvP/r7L5kvwG0Vg== From: Alexander Dahl To: Claudiu Beznea Cc: Christian Melki , Srinivas Kandagatla , linux-arm-kernel@lists.infradead.org (moderated list:MICROCHIP OTPC DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v1 07/12] nvmem: microchip-otpc: Add missing register definitions Date: Wed, 21 Aug 2024 12:59:38 +0200 Message-Id: <20240821105943.230281-8-ada@thorsis.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240821105943.230281-1-ada@thorsis.com> References: <20240821105943.230281-1-ada@thorsis.com> MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240821_035957_804506_2742AFB6 X-CRM114-Status: UNSURE ( 6.68 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to datasheets DS60001765B for SAMA7G5 and DS60001579G for SAM9X60. Signed-off-by: Alexander Dahl --- drivers/nvmem/microchip-otpc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c index b8ed7412dbca..4630e96243ac 100644 --- a/drivers/nvmem/microchip-otpc.c +++ b/drivers/nvmem/microchip-otpc.c @@ -21,9 +21,24 @@ #define MCHP_OTPC_AR (0x8) #define MCHP_OTPC_SR (0xc) #define MCHP_OTPC_SR_READ BIT(6) +#define MCHP_OTPC_IER (0x10) +#define MCHP_OTPC_IDR (0x14) +#define MCHP_OTPC_IMR (0x18) +#define MCHP_OTPC_ISR (0x1C) +#define MCHP_OTPC_ISR_COERR BIT(13) #define MCHP_OTPC_HR (0x20) #define MCHP_OTPC_HR_SIZE GENMASK(15, 8) #define MCHP_OTPC_DR (0x24) +#define MCHP_OTPC_BAR (0x30) +#define MCHP_OTPC_CAR (0x34) +#define MCHP_OTPC_UHC0R (0x50) +#define MCHP_OTPC_UHC1R (0x54) +#define MCHP_OTPC_UID0R (0x60) +#define MCHP_OTPC_UID1R (0x64) +#define MCHP_OTPC_UID2R (0x68) +#define MCHP_OTPC_UID3R (0x6C) +#define MCHP_OTPC_WPMR (0xE4) +#define MCHP_OTPC_WPSR (0xE8) #define MCHP_OTPC_NAME "mchp-otpc" #define MCHP_OTPC_SIZE (11 * 1024)