@@ -34,6 +34,8 @@
#define GPIO_TYPE_V2_1 (0x0101157C) /* GPIO Version ID 0x0101157C */
#define GPIO_TYPE_V2_2 (0x010219C8) /* GPIO Version ID 0x010219C8 */
+#define GPIO_MAX_PINS (32)
+
static const struct rockchip_gpio_regs gpio_regs_v1 = {
.port_dr = 0x00,
.port_ddr = 0x04,
@@ -590,6 +592,16 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
gc->label = bank->name;
gc->parent = bank->dev;
+ if (!gc->base)
+ gc->base = GPIO_MAX_PINS * bank->bank_num;
+ if (!gc->ngpio)
+ gc->ngpio = GPIO_MAX_PINS;
+ if (!gc->label) {
+ gc->label = kasprintf(GFP_KERNEL, "gpio%d", bank->bank_num);
+ if (!gc->label)
+ return -ENOMEM;
+ }
+
ret = gpiochip_add_data(gc, bank);
if (ret) {
dev_err(bank->dev, "failed to add gpiochip %s, %d\n",
@@ -597,36 +609,6 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
return ret;
}
- /*
- * For DeviceTree-supported systems, the gpio core checks the
- * pinctrl's device node for the "gpio-ranges" property.
- * If it is present, it takes care of adding the pin ranges
- * for the driver. In this case the driver can skip ahead.
- *
- * In order to remain compatible with older, existing DeviceTree
- * files which don't set the "gpio-ranges" property or systems that
- * utilize ACPI the driver has to call gpiochip_add_pin_range().
- */
- if (!of_property_read_bool(bank->of_node, "gpio-ranges")) {
- struct device_node *pctlnp = of_get_parent(bank->of_node);
- struct pinctrl_dev *pctldev = NULL;
-
- if (!pctlnp)
- return -ENODATA;
-
- pctldev = of_pinctrl_get(pctlnp);
- of_node_put(pctlnp);
- if (!pctldev)
- return -ENODEV;
-
- ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
- gc->base, gc->ngpio);
- if (ret) {
- dev_err(bank->dev, "Failed to add pin range\n");
- goto fail;
- }
- }
-
ret = rockchip_interrupts_register(bank);
if (ret) {
dev_err(bank->dev, "failed to register interrupt, %d\n", ret);
@@ -760,7 +742,6 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
bank->bank_num = bank_id;
bank->dev = dev;
- bank->of_node = dev->of_node;
bank->reg_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(bank->reg_base))
@@ -807,6 +788,17 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
goto err_unlock;
}
+ if (!device_property_read_bool(bank->dev, "gpio-ranges") && pctldev) {
+ struct gpio_chip *gc = &bank->gpio_chip;
+
+ ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
+ gc->base, gc->ngpio);
+ if (ret) {
+ dev_err(bank->dev, "Failed to add pin range\n");
+ goto err_unlock;
+ }
+ }
+
while (!list_empty(&bank->deferred_pins)) {
struct rockchip_pin_deferred *cfg;
updates the Rockchip GPIO driver to function correctly even when the pinctrl device is not present. Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com> --- drivers/gpio/gpio-rockchip.c | 54 +++++++++++++++--------------------- 1 file changed, 23 insertions(+), 31 deletions(-)